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Classes | |
| struct | DQ_DEVSTATE |
Macros | |
| #define | DQ_COMTYPE_RAW 1 |
| #define | DQ_COMTYPE_UDP 2 |
| #define | DQ_MODE_PWRUP 1 /* device just powered-up */ |
| #define | DQ_MODE_TEST 2 /* device is in self-test mode */ |
| #define | DQ_MODE_READY 4 /* device completed self-initializtion */ |
| #define | DQ_MODE_INIT 8 /* device initialized from CC */ |
| #define | DQ_MODE_OPS 16 /* device is in operation */ |
| #define | TYPE_IOM 0x2 |
| #define | TYPE_AUTO 0x4 |
| #define | TYPE_SA 0x8 |
| #define | TYPE_DL 0x10 |
| #define | TYPE_PAC 0x20 |
| #define | TYPE_MODBUS 0x24 |
| #define | TYPE_SIMU 0x28 |
| #define | OPTION_LOGGER 0x00800400 |
| #define | OPTION_LINUX 0x00100000 |
| #define | OPTION_SIMULINK 0x00100001 |
| #define | PORT_ETH 0 |
| #define | PORT_UART 1 |
| #define | PORT_IRDA 2 |
| #define | PORT_USB 3 |
| #define | PROT_DQTS 0 |
| #define | PROT_DQVT 1 |
| #define | PROT_TCPIP 2 |
| #define | PROT_USB 3 |
| #define | DQRDWRLST uint32 |
| #define | RWLSTSIZE 256 |
| #define | DQ_MAXWAIT 0xfffff |
| #define | DQL_TRANSFER_DLY 9 |
| #define | DQL_CLI_LSR (0x0000) |
| #define | DQL_CLI_LCR (0x0000) |
| #define | DQL_CLI_ISDR (0x0004) |
| #define | DQL_CLI_ISTR (0x0004) |
| #define | DQL_CLI_LID (0x0008) |
| #define | DQL_CLI_NISV (0x000C) |
| #define | DQL_CLI_SPD0 (0x0010) |
| #define | DQL_CLI_SPD1 (0x0014) |
| #define | CLI_GPIOR (0x0018) |
| #define | DQL_CLI_IER (0x001C) |
| #define | DQL_CLI_SPD0M (0x001C) |
| #define | DQL_CLI_IMR (0x0020) |
| #define | DQL_CLI_SPD1M (0x0020) |
| #define | DQL_CLI_ISR (0x0024) |
| #define | DQL_CLI_ICR (0x0024) |
| #define | DQL_CLI_EDR (0x0028) |
| #define | DQL_CLI_ECR (0x0028) |
| #define | DQL_CLI_ERD (0x002C) |
| #define | DQL_CLI_EWR (0x002C) |
| #define | DQL_CLI_STAT0 (0x0030) |
| #define | DQL_CLI_STAT1 (0x0034) |
| #define | DQL_CLI_STAT2 (0x0038) |
| #define | DQL_CLI_CFGDCDC (0x0038) |
| #define | DQL_CLI_STAT3 (0x003C) |
| #define | DQL_CLI_RSV0040 (0x0040) |
| #define | DQL_CLI_RSV0044 (0x0044) |
| #define | DQL_CLI_RSV0048 (0x0048) |
| #define | DQL_CLI_RSV004C (0x004C) |
| #define | DQL_CLI_RSV0050 (0x0050) |
| #define | DQL_CLI_ICDR (0x0054) |
| #define | DQL_CLI_COID (0x0058) |
| #define | DQL_CLI_CIID (0x005C) |
| #define | DQL_CLI_IFAR (0x005C) |
| #define | DQL_CLI_CLODP (0x0060) |
| #define | DQL_CLI_OFDC (0x0064) |
| #define | DQL_CLI_OFIL (0x0064) |
| #define | DQL_CLI_OFDR (0x0068) |
| #define | DQL_CLI_CLIDP (0x006C) |
| #define | DQL_CLI_IFDC (0x0070) |
| #define | DQL_CLI_IFIL (0x0070) |
| #define | DQL_CLI_IFDR (0x0074) |
| #define | DQL_CLI_LERS (0x0078) |
| #define | DQL_CLI_LRR (0x007C) |
| #define | DQL_CLI_SYNCS (0x0080) |
| #define | DQL_CLI_ESCFG (0x0080) |
| #define | DQL_CLI_BTSTV (0x0084) |
| #define | DQL_CLI_CLIS (0x0088) |
| #define | DQL_CLI_CLOS (0x008C) |
| #define | DQL_CLI_ISOS (0x0090) |
| #define | DQL_CLI_BTS (0x0094) |
| #define | DQL_CLI_BTP (0x0094) |
| #define | DQL_CLI_TSCFG (0x0098) |
| #define | DQL_CLI_TPCFG (0x009C) |
| #define | DQL_CLI_SCLO (0x00A0) |
| #define | DQL_CLI_TMR0D (0x00A0) |
| #define | DQL_CLI_SCVO (0x00A4) |
| #define | DQL_CLI_TMR0C (0x00A4) |
| #define | DQL_CLI_SCLI (0x00A8) |
| #define | DQL_CLI_TMR1D (0x00A8) |
| #define | DQL_CLI_SCVI (0x00AC) |
| #define | DQL_CLI_TMR1C (0x00AC) |
| #define | DQL_CLI_TMRCFG (0x00B0) |
| #define | DQL_CLI_ICLC (0x00B4) |
| #define | DQL_CLI_TSTV (0x00B8) |
| #define | DQL_CLI_TSTD (0x00B8) |
| #define | DQL_CLI_ICLD (0x00BC) |
| #define | DQL_CLI_OCLC (0x00BC) |
| #define | DQL_CLI_SYNCE (0x00BC) |
| #define | DQL_CLI_RSV00C0 (0x00C0) |
| #define | DQL_CLI_RSV01FC (0x01FC) |
| #define | DQL_CLI_DDO0 (0x0200) |
| #define | DQL_CLI_DDO63 (0x02FC) |
| #define | DQL_CLI_DDI0 (0x0300) |
| #define | DQL_CLI_DDI63 (0x03FC) |
| #define | DQL_CLI_LIO0 (0x2000) |
| #define | DQL_CLI_LIO2047 (0x3FFC) |
| #define | DQL_CLI_CLO0 (0x4000) |
| #define | DQL_CLI_CLO4095 (0x7FFC) |
| #define | DQL_CLI_CLI0 (0x8000) |
| #define | DQL_CLI_CLI4095 (0xBFFC) |
| #define | DQL_CLI_CDO0 (0xC000) |
| #define | DQL_CLI_CDO4095 (0xFFFC) |
| #define | DQL_CLI_CDI0 (0xC000) |
| #define | DQL_CLI_CDI4095 (0xFFFC) |
| #define | DQL_CLI_LAST (0xFFFF) |
| #define | DQL_EE_READ(A) ((1UL<<21)|(2UL<<19)|((A&0x7FF)<<8)) |
| #define | DQL_EE_WEN() ((1UL<<21)|(3UL<<17)) |
| #define | DQL_EE_WRITE(A, D) ((1UL<<21)|(1UL<<19)|((A&0x7FF)<<8)|(D&0xFF)) |
| #define | DQL_EE_WRITEALL(D) ((1UL<<21)|(1UL<<17)|(D&0xFF)) |
| #define | DQL_EE_WDS() ((1UL<<21)) |
| #define | DQL_EE_ERASE(A) ((1UL<<21)|(3UL<<19)|((A&0x7FF)<<8)) |
| #define | DQL_EE_ERAL() ((1UL<<21)|(2UL<<17)) |
| #define | DQL_EE_EDR 0x80000000 |
| #define | DQL_EE_EDLY(d) ((d&0xf)<<28) |
| #define | DQL_EE_DLY 10 |
| #define | DQL_IFAR_ONECLOCK (0x80000000) |
| #define | DQL_CL_ENTRY (1UL<<7) |
| #define | DQL_CL_SKIP (1UL<<6) |
| #define | DQL_CL_IRQ (1UL<<5) |
| #define | DQL_CL_CLC_CLK (1UL<<4) |
| #define | DQL_CL_CVC_CLK (1UL<<3) |
| #define | DQL_CL_CL_CLK (1UL<<2) |
| #define | DQL_CL_CMD2 (1UL<<1) |
| #define | DQL_CL_CMD1 (1UL<<0) |
| #define | DQL_CL_CMD_NOP (0) |
| #define | DQL_CL_CMD_RD (1) |
| #define | DQL_CL_CMD_WR0 (2) |
| #define | DQL_CL_CMD_WR1 (3) |
| #define | DQL_LCR_LIOE (1UL<<31) |
| #define | DQL_LCR_LRE (1UL<<30) |
| #define | DQL_LCR_ICLE (1UL<<29) |
| #define | DQL_LCR_OCLE (1UL<<28) |
| #define | DQL_LCR_ICCE (1UL<<27) |
| #define | DQL_LCR_OCCE (1UL<<26) |
| #define | DQL_LCR_CLOM (1UL<<25) |
| #define | DQL_LCR_ICLD (1UL<<24) |
| #define | DQL_LCR_CLIF (1UL<<23) |
| #define | DQL_LCR_CLOF (1UL<<22) |
| #define | DQL_LCR_CLOR (1UL<<21) |
| #define | DQL_LCR_RST (1UL<<20) |
| #define | DQL_LCR_TA_EN (1UL<<19) |
| #define | DQL_LCR_401_LED (1UL<<1) |
| #define | DQL_LCR_416_LED (1UL<<1) |
| #define | DQL_LCR_416_DCEN (1UL<<0) |
| #define | DQL_LCR403_EN (1UL<<0) |
| #define | DQL_LCR201_DCDIS (1UL<<0) |
| #define | DQL_LCR205_MRE (1UL<<6) |
| #define | DQL_LCR205_SEL1 (1UL<<5) |
| #define | DQL_LCR205_SEL0 (1UL<<4) |
| #define | DQL_LCR205_FCLR (1UL<<2) |
| #define | DQL_LCR205_LED (1UL<<1) |
| #define | DQL_LCR501_P4RST (1UL<<5) |
| #define | DQL_LCR501_P3RST (1UL<<4) |
| #define | DQL_LCR501_P2RST (1UL<<3) |
| #define | DQL_LCR501_P1RST (1UL<<2) |
| #define | DQL_LCR501_LED (1UL<<1) |
| #define | DQL_LCR508_P8RST (1UL<<9) |
| #define | DQL_LCR508_P7RST (1UL<<8) |
| #define | DQL_LCR508_P6RST (1UL<<7) |
| #define | DQL_LCR508_P5RST (1UL<<6) |
| #define | DQL_LCR508_P4RST (1UL<<5) |
| #define | DQL_LCR508_P3RST (1UL<<4) |
| #define | DQL_LCR508_P2RST (1UL<<3) |
| #define | DQL_LCR508_P1RST (1UL<<2) |
| #define | DQL_SL508_IRQ (1UL<<0) |
| #define | DQL_LSR_BSY (1UL<<31) |
| #define | DQL_LSR_ILS (1UL<<30) |
| #define | DQL_LSR_EDR (1UL<<29) |
| #define | DQL_LSR_EIB (1UL<<28) |
| #define | DQL_LSR_IDR (1UL<<27) |
| #define | DQL_LSR_IBT (1UL<<26) |
| #define | DQL_LSR_IBR (1UL<<25) |
| #define | DQL_LSR_LES (1UL<<24) |
| #define | DQL_LSR_EXT1 (1UL<<23) |
| #define | DQL_LSR_EXT0 (1UL<<22) |
| #define | DQL_LSR_EXT_POS (22) |
| #define | DQL_LSR_INT1 (1UL<<21) |
| #define | DQL_LSR_INT0 (1UL<<20) |
| #define | DQL_IR_IFI (1UL<<31) |
| #define | DQL_IR_IFF (1UL<<30) |
| #define | DQL_IR_EDI (1UL<<29) |
| #define | DQL_IR_ERI (1UL<<28) |
| #define | DQL_IR_IDI (1UL<<27) |
| #define | DQL_IR_IRI (1UL<<26) |
| #define | DQL_IR_ICI (1UL<<25) |
| #define | DQL_IR_OCI (1UL<<24) |
| #define | DQL_IR_IOI (1UL<<23) |
| #define | DQL_IR_OUI (1UL<<22) |
| #define | DQL_IR_TI (1UL<<21) |
| #define | DQL_IR_OFI (1UL<<20) |
| #define | DQL_IR_OFE (1UL<<19) |
| #define | DQL_IR_STT (1UL<<18) |
| #define | DQL_IR_SPT (1UL<<17) |
| #define | DQL_IR_TMR1 (1UL<<16) |
| #define | DQL_IR_DII (1UL<<0) |
| #define | DQL_IR_OUCI (1UL<<0) |
| #define | DQL_IR_P4TO (1UL<<15) |
| #define | DQL_IR_P4UI (1UL<<14) |
| #define | DQL_IR_P4RX (1UL<<13) |
| #define | DQL_IR_P4TX (1UL<<12) |
| #define | DQL_IR_P3TO (1UL<<11) |
| #define | DQL_IR_P3UI (1UL<<10) |
| #define | DQL_IR_P3RX (1UL<<9) |
| #define | DQL_IR_P3TX (1UL<<8) |
| #define | DQL_IR_P2TO (1UL<<7) |
| #define | DQL_IR_P2UI (1UL<<6) |
| #define | DQL_IR_P2RX (1UL<<5) |
| #define | DQL_IR_P2TX (1UL<<4) |
| #define | DQL_IR_P1TO (1UL<<3) |
| #define | DQL_IR_P1UI (1UL<<2) |
| #define | DQL_IR_P1RX (1UL<<1) |
| #define | DQL_IR_P1TX (1UL<<0) |
| #define | DQL_IR_CAN3 (1UL<<3) |
| #define | DQL_IR_CAN2 (1UL<<2) |
| #define | DQL_IR_CAN1 (1UL<<1) |
| #define | DQL_IR_CAN0 (1UL<<0) |
| #define | DQL_IR_CTU7 (1UL<<7) |
| #define | DQL_IR_CTU6 (1UL<<6) |
| #define | DQL_IR_CTU5 (1UL<<5) |
| #define | DQL_IR_CTU4 (1UL<<4) |
| #define | DQL_IR_CTU3 (1UL<<3) |
| #define | DQL_IR_CTU2 (1UL<<2) |
| #define | DQL_IR_CTU1 (1UL<<1) |
| #define | DQL_IR_CTU0 (1UL<<0) |
| #define | DQL_CLI_STAT0_FINMASK (0xffff0000) |
| #define | DQL_CLI_STAT0_FOUMASK (0x0000ffff) |
| #define | DQL_CLI_STAT1_CDORD (1UL<<26) |
| #define | DQL_CLI_STAT1_CYCLONE2 (1UL<<25) |
| #define | DQL_CLI_STAT1_LERS (1UL<<24) |
| #define | DQL_CLI_STAT1_CLKINT1 (1UL<<23) |
| #define | DQL_CLI_STAT1_ICDR (1UL<<22) |
| #define | DQL_CLI_STAT1_CALEN (1UL<<21) |
| #define | DQL_CLI_STAT1_SCOUNT (1UL<<20) |
| #define | DQL_CLI_STAT1_IFAE (1UL<<19) |
| #define | DQL_CLI_STAT1_NOEPROM (1UL<<18) |
| #define | DQL_CLI_STAT1_ACEX (1UL<<17) |
| #define | DQL_CLI_STAT1_CYCLONE (1UL<<16) |
| #define | DQL_CLI_STAT1_NOEXT (1UL<<15) |
| #define | DQL_CLI_STAT1_IS11 (1UL<<14) |
| #define | DQL_CLI_STAT1_IS16_5 (1UL<<13) |
| #define | DQL_CLI_STAT1_IS33 (1UL<<12) |
| #define | DQL_CLI_STAT1_IS66 (1UL<<11) |
| #define | DQL_CLI_STAT1_2WIRE (1UL<<10) |
| #define | DQL_CLI_STAT1_ENISWR (1UL<<9) |
| #define | DQL_CLI_STAT1_ENISRD (1UL<<8) |
| #define | DQL_CLI_STAT1_ENPWM (1UL<<7) |
| #define | DQL_CLI_STAT1_ENCLI (1UL<<6) |
| #define | DQL_CLI_STAT1_ENCLO (1UL<<5) |
| #define | DQL_CLI_STAT1_NOSPD (1UL<<4) |
| #define | DQL_CLI_STAT1_NOTRIG (1UL<<3) |
| #define | DQL_CLI_STAT1_NOIS (1UL<<2) |
| #define | DQL_CLI_STAT1_NOSYNC (1UL<<1) |
| #define | DQL_CLI_STAT1_NOTEST (1UL<<0) |
| #define | DQL_CLI_STAT2_DATA16MASK (0xffff0000) |
| #define | DQL_CLI_STAT2_ADDR16MASK (0x0000ffff) |
| #define | DQL_CLI_IFIL_FFMASK (0xffff0000) |
| #define | DQL_CLI_IFIL_FFMASK0 (16UL) |
| #define | DQL_CLI_IFIL_FHMASK (0x0000ffff) |
| #define | DQL_IFIL_OFIL(FF, FH) (((FF)<<DQL_CLI_IFIL_FFMASK0) | ((FH)&DQL_CLI_IFIL_FHMASK)) |
| #define | DQL_SYNC_LINES (4) |
| #define | DQL_ESCFG_SRC_TB (0x0) |
| #define | DQL_ESCFG_SRC_CLICL (0x1) |
| #define | DQL_ESCFG_SRC_CLICV (0x2) |
| #define | DQL_ESCFG_SRC_CLOCL (0x3) |
| #define | DQL_ESCFG_SRC_CLOCV (0x4) |
| #define | DQL_ESCFG_SRC_EXT0 (0x5) |
| #define | DQL_ESCFG_SRC_EXT1 (0x6) |
| #define | DQL_ESCFG_SRC_STRT (0x7) |
| #define | DQL_ESCFG_SRC_STPT (0x8) |
| #define | DQL_ESCFG_SRC_TMR0P (0x9) |
| #define | DQL_ESCFG_SRC_TMR1P (0xA) |
| #define | DQL_ESCFG_SRC_ZERO (0xB) |
| #define | DQL_ESCFG_SRC_ONE (0xC) |
| #define | DQL_ESCFG_MODE3 (1UL<<31) |
| #define | DQL_ESCFG_SRC33 (27) |
| #define | DQL_ESCFG_SRC32 (26) |
| #define | DQL_ESCFG_SRC31 (25) |
| #define | DQL_ESCFG_SRC30 (24) |
| #define | DQL_ESCFG_MODE2 (1UL<<23) |
| #define | DQL_ESCFG_SRC23 (19) |
| #define | DQL_ESCFG_SRC22 (18) |
| #define | DQL_ESCFG_SRC21 (17) |
| #define | DQL_ESCFG_SRC20 (16) |
| #define | DQL_ESCFG_MODE1 (1UL<<15) |
| #define | DQL_ESCFG_SRC13 (11) |
| #define | DQL_ESCFG_SRC12 (10) |
| #define | DQL_ESCFG_SRC11 (9) |
| #define | DQL_ESCFG_SRC10 (8) |
| #define | DQL_ESCFG_MODE0 (1UL<<7) |
| #define | DQL_ESCFG_SRC03 (3) |
| #define | DQL_ESCFG_SRC02 (2) |
| #define | DQL_ESCFG_SRC01 (1) |
| #define | DQL_ESCFG_SRC00 (0) |
| #define | DQL_CLIS_CVR (1UL<<15) |
| #define | DQL_CLIS_CL_NOTRIG (1UL<<14) |
| #define | DQL_CLIS_CL_2CLK (1UL<<13) |
| #define | DQL_CLIS_CL_EDGE (1UL<<12) |
| #define | DQL_CLIS_CL_SRC3 (11) |
| #define | DQL_CLIS_CL_SRC2 (10) |
| #define | DQL_CLIS_CL_SRC1 (9) |
| #define | DQL_CLIS_CL_SRC0 (8) |
| #define | DQL_CLIS_CV_NOTRIG (1UL<<6) |
| #define | DQL_CLIS_CV_2CLK (1UL<<5) |
| #define | DQL_CLIS_CV_EDGE (1UL<<4) |
| #define | DQL_CLIS_CV_SRC3 (3) |
| #define | DQL_CLIS_CV_SRC2 (2) |
| #define | DQL_CLIS_CV_SRC1 (1) |
| #define | DQL_CLIS_CV_SRC0 (0) |
| #define | DQL_CLIS_SRC_SW (0x0) |
| #define | DQL_CLIS_SRC_TMR0 (0x1) |
| #define | DQL_CLIS_SRC_CROSS (0x2) |
| #define | DQL_CLIS_SRC_TMR1 (0x3) |
| #define | DQL_CLIS_SRC_EXT0 (0x4) |
| #define | DQL_CLIS_SRC_EXT1 (0x5) |
| #define | DQL_CLIS_SRC_TB (0x6) |
| #define | DQL_CLIS_SRC_INTER0 (0x8) |
| #define | DQL_CLIS_SRC_INTER1 (0x9) |
| #define | DQL_CLIS_SRC_SYNC0 (0xC) |
| #define | DQL_CLIS_SRC_SYNC1 (0xD) |
| #define | DQL_CLIS_SRC_SYNC2 (0xE) |
| #define | DQL_CLIS_SRC_SYNC3 (0xF) |
| #define | DQL_ISOS_SRC_0 (0x0) |
| #define | DQL_ISOS_SRC_TMR0C (0x1) |
| #define | DQL_ISOS_SRC_1 (0x2) |
| #define | DQL_ISOS_SRC_TMR1C (0x3) |
| #define | DQL_ISOS_SRC_PBUTN (0x4) |
| #define | DQL_ISOS_SRC_CLICV (0x5) |
| #define | DQL_ISOS_SRC_CLICL (0x6) |
| #define | DQL_ISOS_SRC_CLOCV (0x7) |
| #define | DQL_ISOS_SRC_CLOCL (0x8) |
| #define | DQL_ISOS_SRC_TB (0x9) |
| #define | DQL_ISOS_SRC_STRT (0xA) |
| #define | DQL_ISOS_SRC_STPT (0xB) |
| #define | DQL_ISOS_SRC_SYNC0 (0xC) |
| #define | DQL_ISOS_SRC_SYNC1 (0xD) |
| #define | DQL_ISOS_SRC_SYNC2 (0xE) |
| #define | DQL_ISOS_SRC_SYNC3 (0xF) |
| #define | DQL_ISOS_INT1_SRC3 (11) |
| #define | DQL_ISOS_INT1_SRC2 (10) |
| #define | DQL_ISOS_INT1_SRC1 (9) |
| #define | DQL_ISOS_INT1_SRC0 (8) |
| #define | DQL_ISOS_INT0_SRC3 (3) |
| #define | DQL_ISOS_INT0_SRC2 (2) |
| #define | DQL_ISOS_INT0_SRC1 (1) |
| #define | DQL_ISOS_INT0_SRC0 (0) |
| #define | DQL_TSCFG_SRC_NA (0x0) |
| #define | DQL_TSCFG_SRC_SW (0x1) |
| #define | DQL_TSCFG_SRC_EXT0 (0x4) |
| #define | DQL_TSCFG_SRC_EXT1 (0x5) |
| #define | DQL_TSCFG_SRC_TB (0x6) |
| #define | DQL_TSCFG_SRC_PB (0x7) |
| #define | DQL_TSCFG_SRC_SYNC0 (0xC) |
| #define | DQL_TSCFG_SRC_SYNC1 (0xD) |
| #define | DQL_TSCFG_SRC_SYNC2 (0xE) |
| #define | DQL_TSCFG_SRC_SYNC3 (0xF) |
| #define | DQL_TSCFG_EDGE (4) |
| #define | DQL_TSCFG_SRC3 (3) |
| #define | DQL_TSCFG_SRC2 (2) |
| #define | DQL_TSCFG_SRC1 (1) |
| #define | DQL_TSCFG_SRC0 (0) |
| #define | DQL_TMRCFG_TMR1_ENABLE (1UL<<7) |
| #define | DQL_TMRCFG_TMR1_INV (1UL<<6) |
| #define | DQL_TMRCFG_TMR1_MODE1 (1UL<<5) |
| #define | DQL_TMRCFG_TMR1_MODE0 (1UL<<4) |
| #define | DQL_TMRCFG_TMR0_ENABLE (1UL<<3) |
| #define | DQL_TMRCFG_TMR0_INV (1UL<<2) |
| #define | DQL_TMRCFG_TMR0_MODE1 (1UL<<1) |
| #define | DQL_TMRCFG_TMR0_MODE0 (1UL<<0) |
| #define | DQL_TMRCFG_MODE_CNT (0) |
| #define | DQL_TMRCFG_MODE_PWM (1) |
| #define | DQL_STAT0_FINSIZE(VAL) ((VAL&DQL_CLI_STAT0_FINMASK)>>16) |
| #define | DQL_STAT0_FOUTSIZE(VAL) (VAL&DQL_CLI_STAT0_FOUMASK) |
| #define | DQL_STAT1_CDORD(VAL) ((VAL& DQL_CLI_STAT1_CDORD)>>26) |
| #define | DQL_STAT1_CYCLONE2(VAL) ((VAL& DQL_CLI_STAT1_CYCLONE2)>>25) |
| #define | DQL_STAT1_LERS(VAL) ((VAL& DQL_CLI_STAT1_LERS)>>24) |
| #define | DQL_STAT1_CLKINT1(VAL) ((VAL& DQL_CLI_STAT1_CLKINT1)>>23) |
| #define | DQL_STAT1_ICDR(VAL) ((VAL& DQL_CLI_STAT1_ICDR)>>22) |
| #define | DQL_STAT1_CALEN(VAL) ((VAL& DQL_CLI_STAT1_CALEN)>>21) |
| #define | DQL_STAT1_SCOUNT(VAL) ((VAL& DQL_CLI_STAT1_SCOUNT)>>20) |
| #define | DQL_STAT1_IFAE(VAL) ((VAL& DQL_CLI_STAT1_IFAE)>>19) |
| #define | DQL_STAT1_NOEPROM(VAL) ((VAL& DQL_CLI_STAT1_NOEPROM)>>18) |
| #define | DQL_STAT1_ACEX(VAL) ((VAL& DQL_CLI_STAT1_ACEX)>>17) |
| #define | DQL_STAT1_CYCLONE(VAL) ((VAL& DQL_CLI_STAT1_CYCLONE)>>16) |
| #define | DQL_STAT1_NOEXT(VAL) ((VAL& DQL_CLI_STAT1_NOEXT )>>15) |
| #define | DQL_STAT1_IS11(VAL) ((VAL& DQL_CLI_STAT1_IS11)>>14) |
| #define | DQL_STAT1_IS16_5(VAL) ((VAL& DQL_CLI_STAT1_IS16_5)>>13) |
| #define | DQL_STAT1_IS33(VAL) ((VAL& DQL_CLI_STAT1_IS33)>>12) |
| #define | DQL_STAT1_IS66(VAL) ((VAL& DQL_CLI_STAT1_IS66)>>11) |
| #define | DQL_STAT1_2WIRE(VAL) ((VAL& DQL_CLI_STAT1_2WIRE)>>10) |
| #define | DQL_STAT1_ENISWR(VAL) ((VAL& DQL_CLI_STAT1_ENISWR)>>9) |
| #define | DQL_STAT1_ENISRD(VAL) ((VAL& DQL_CLI_STAT1_ENISRD)>>8) |
| #define | DQL_STAT1_ENPWM(VAL) ((VAL& DQL_CLI_STAT1_ENPWM)>>7) |
| #define | DQL_STAT1_ENCLI(VAL) ((VAL& DQL_CLI_STAT1_ENCLI)>>6) |
| #define | DQL_STAT1_ENCLO(VAL) ((VAL& DQL_CLI_STAT1_ENCLO)>>5) |
| #define | DQL_STAT1_NOSPD(VAL) ((VAL& DQL_CLI_STAT1_NOSPD)>>4) |
| #define | DQL_STAT1_NOTRIG(VAL) ((VAL& DQL_CLI_STAT1_NOTRIG)>>3) |
| #define | DQL_STAT1_NOIS(VAL) ((VAL& DQL_CLI_STAT1_NOIS)>>2) |
| #define | DQL_STAT1_NOSYNC(VAL) ((VAL& DQL_CLI_STAT1_NOSYNC)>>1) |
| #define | DQL_STAT1_NOTEST(VAL) ((VAL& DQL_CLI_STAT1_NOTEST)>>0) |
| #define | DQL_STAT2_DATA16(VAL) ((VAL&DQL_CLI_STAT2_DATA16MASK)>>16) |
| #define | DQL_STAT2_ADDR16(VAL) (VAL&DQL_CLI_STAT2_ADDR16MASK) |
| #define | DQL_CLI_NISV_BULD(VAL) (VAL & 0xFFFF) |
| #define | USE_VALLOC |
| #define | HEAPBUFSIZE (64*1024*1024) |
| #define | DATABUFSIZE (8*1024*1024) |
Macro Definition Documentation
◆ CLI_GPIOR
| #define CLI_GPIOR (0x0018) |
◆ DATABUFSIZE
| #define DATABUFSIZE (8*1024*1024) |
◆ DQ_COMTYPE_RAW
| #define DQ_COMTYPE_RAW 1 |
◆ DQ_COMTYPE_UDP
| #define DQ_COMTYPE_UDP 2 |
◆ DQ_MAXWAIT
| #define DQ_MAXWAIT 0xfffff |
◆ DQ_MODE_INIT
| #define DQ_MODE_INIT 8 /* device initialized from CC */ |
◆ DQ_MODE_OPS
| #define DQ_MODE_OPS 16 /* device is in operation */ |
◆ DQ_MODE_PWRUP
| #define DQ_MODE_PWRUP 1 /* device just powered-up */ |
◆ DQ_MODE_READY
| #define DQ_MODE_READY 4 /* device completed self-initializtion */ |
◆ DQ_MODE_TEST
| #define DQ_MODE_TEST 2 /* device is in self-test mode */ |
◆ DQL_CL_CL_CLK
| #define DQL_CL_CL_CLK (1UL<<2) |
◆ DQL_CL_CLC_CLK
| #define DQL_CL_CLC_CLK (1UL<<4) |
◆ DQL_CL_CMD1
| #define DQL_CL_CMD1 (1UL<<0) |
◆ DQL_CL_CMD2
| #define DQL_CL_CMD2 (1UL<<1) |
◆ DQL_CL_CMD_NOP
| #define DQL_CL_CMD_NOP (0) |
◆ DQL_CL_CMD_RD
| #define DQL_CL_CMD_RD (1) |
◆ DQL_CL_CMD_WR0
| #define DQL_CL_CMD_WR0 (2) |
◆ DQL_CL_CMD_WR1
| #define DQL_CL_CMD_WR1 (3) |
◆ DQL_CL_CVC_CLK
| #define DQL_CL_CVC_CLK (1UL<<3) |
◆ DQL_CL_ENTRY
| #define DQL_CL_ENTRY (1UL<<7) |
◆ DQL_CL_IRQ
| #define DQL_CL_IRQ (1UL<<5) |
◆ DQL_CL_SKIP
| #define DQL_CL_SKIP (1UL<<6) |
◆ DQL_CLI_BTP
| #define DQL_CLI_BTP (0x0094) |
◆ DQL_CLI_BTS
| #define DQL_CLI_BTS (0x0094) |
◆ DQL_CLI_BTSTV
| #define DQL_CLI_BTSTV (0x0084) |
◆ DQL_CLI_CDI0
| #define DQL_CLI_CDI0 (0xC000) |
◆ DQL_CLI_CDI4095
| #define DQL_CLI_CDI4095 (0xFFFC) |
◆ DQL_CLI_CDO0
| #define DQL_CLI_CDO0 (0xC000) |
◆ DQL_CLI_CDO4095
| #define DQL_CLI_CDO4095 (0xFFFC) |
◆ DQL_CLI_CFGDCDC
| #define DQL_CLI_CFGDCDC (0x0038) |
◆ DQL_CLI_CIID
| #define DQL_CLI_CIID (0x005C) |
◆ DQL_CLI_CLI0
| #define DQL_CLI_CLI0 (0x8000) |
◆ DQL_CLI_CLI4095
| #define DQL_CLI_CLI4095 (0xBFFC) |
◆ DQL_CLI_CLIDP
| #define DQL_CLI_CLIDP (0x006C) |
◆ DQL_CLI_CLIS
| #define DQL_CLI_CLIS (0x0088) |
◆ DQL_CLI_CLO0
| #define DQL_CLI_CLO0 (0x4000) |
◆ DQL_CLI_CLO4095
| #define DQL_CLI_CLO4095 (0x7FFC) |
◆ DQL_CLI_CLODP
| #define DQL_CLI_CLODP (0x0060) |
◆ DQL_CLI_CLOS
| #define DQL_CLI_CLOS (0x008C) |
◆ DQL_CLI_COID
| #define DQL_CLI_COID (0x0058) |
◆ DQL_CLI_DDI0
| #define DQL_CLI_DDI0 (0x0300) |
◆ DQL_CLI_DDI63
| #define DQL_CLI_DDI63 (0x03FC) |
◆ DQL_CLI_DDO0
| #define DQL_CLI_DDO0 (0x0200) |
◆ DQL_CLI_DDO63
| #define DQL_CLI_DDO63 (0x02FC) |
◆ DQL_CLI_ECR
| #define DQL_CLI_ECR (0x0028) |
◆ DQL_CLI_EDR
| #define DQL_CLI_EDR (0x0028) |
◆ DQL_CLI_ERD
| #define DQL_CLI_ERD (0x002C) |
◆ DQL_CLI_ESCFG
| #define DQL_CLI_ESCFG (0x0080) |
◆ DQL_CLI_EWR
| #define DQL_CLI_EWR (0x002C) |
◆ DQL_CLI_ICDR
| #define DQL_CLI_ICDR (0x0054) |
◆ DQL_CLI_ICLC
| #define DQL_CLI_ICLC (0x00B4) |
◆ DQL_CLI_ICLD
| #define DQL_CLI_ICLD (0x00BC) |
◆ DQL_CLI_ICR
| #define DQL_CLI_ICR (0x0024) |
◆ DQL_CLI_IER
| #define DQL_CLI_IER (0x001C) |
◆ DQL_CLI_IFAR
| #define DQL_CLI_IFAR (0x005C) |
◆ DQL_CLI_IFDC
| #define DQL_CLI_IFDC (0x0070) |
◆ DQL_CLI_IFDR
| #define DQL_CLI_IFDR (0x0074) |
◆ DQL_CLI_IFIL
| #define DQL_CLI_IFIL (0x0070) |
◆ DQL_CLI_IFIL_FFMASK
| #define DQL_CLI_IFIL_FFMASK (0xffff0000) |
◆ DQL_CLI_IFIL_FFMASK0
| #define DQL_CLI_IFIL_FFMASK0 (16UL) |
◆ DQL_CLI_IFIL_FHMASK
| #define DQL_CLI_IFIL_FHMASK (0x0000ffff) |
◆ DQL_CLI_IMR
| #define DQL_CLI_IMR (0x0020) |
◆ DQL_CLI_ISDR
| #define DQL_CLI_ISDR (0x0004) |
◆ DQL_CLI_ISOS
| #define DQL_CLI_ISOS (0x0090) |
◆ DQL_CLI_ISR
| #define DQL_CLI_ISR (0x0024) |
◆ DQL_CLI_ISTR
| #define DQL_CLI_ISTR (0x0004) |
◆ DQL_CLI_LAST
| #define DQL_CLI_LAST (0xFFFF) |
◆ DQL_CLI_LCR
| #define DQL_CLI_LCR (0x0000) |
◆ DQL_CLI_LERS
| #define DQL_CLI_LERS (0x0078) |
◆ DQL_CLI_LID
| #define DQL_CLI_LID (0x0008) |
◆ DQL_CLI_LIO0
| #define DQL_CLI_LIO0 (0x2000) |
◆ DQL_CLI_LIO2047
| #define DQL_CLI_LIO2047 (0x3FFC) |
◆ DQL_CLI_LRR
| #define DQL_CLI_LRR (0x007C) |
◆ DQL_CLI_LSR
| #define DQL_CLI_LSR (0x0000) |
◆ DQL_CLI_NISV
| #define DQL_CLI_NISV (0x000C) |
◆ DQL_CLI_NISV_BULD
| #define DQL_CLI_NISV_BULD | ( | VAL | ) | (VAL & 0xFFFF) |
◆ DQL_CLI_OCLC
| #define DQL_CLI_OCLC (0x00BC) |
◆ DQL_CLI_OFDC
| #define DQL_CLI_OFDC (0x0064) |
◆ DQL_CLI_OFDR
| #define DQL_CLI_OFDR (0x0068) |
◆ DQL_CLI_OFIL
| #define DQL_CLI_OFIL (0x0064) |
◆ DQL_CLI_RSV0040
| #define DQL_CLI_RSV0040 (0x0040) |
◆ DQL_CLI_RSV0044
| #define DQL_CLI_RSV0044 (0x0044) |
◆ DQL_CLI_RSV0048
| #define DQL_CLI_RSV0048 (0x0048) |
◆ DQL_CLI_RSV004C
| #define DQL_CLI_RSV004C (0x004C) |
◆ DQL_CLI_RSV0050
| #define DQL_CLI_RSV0050 (0x0050) |
◆ DQL_CLI_RSV00C0
| #define DQL_CLI_RSV00C0 (0x00C0) |
◆ DQL_CLI_RSV01FC
| #define DQL_CLI_RSV01FC (0x01FC) |
◆ DQL_CLI_SCLI
| #define DQL_CLI_SCLI (0x00A8) |
◆ DQL_CLI_SCLO
| #define DQL_CLI_SCLO (0x00A0) |
◆ DQL_CLI_SCVI
| #define DQL_CLI_SCVI (0x00AC) |
◆ DQL_CLI_SCVO
| #define DQL_CLI_SCVO (0x00A4) |
◆ DQL_CLI_SPD0
| #define DQL_CLI_SPD0 (0x0010) |
◆ DQL_CLI_SPD0M
| #define DQL_CLI_SPD0M (0x001C) |
◆ DQL_CLI_SPD1
| #define DQL_CLI_SPD1 (0x0014) |
◆ DQL_CLI_SPD1M
| #define DQL_CLI_SPD1M (0x0020) |
◆ DQL_CLI_STAT0
| #define DQL_CLI_STAT0 (0x0030) |
◆ DQL_CLI_STAT0_FINMASK
| #define DQL_CLI_STAT0_FINMASK (0xffff0000) |
◆ DQL_CLI_STAT0_FOUMASK
| #define DQL_CLI_STAT0_FOUMASK (0x0000ffff) |
◆ DQL_CLI_STAT1
| #define DQL_CLI_STAT1 (0x0034) |
◆ DQL_CLI_STAT1_2WIRE
| #define DQL_CLI_STAT1_2WIRE (1UL<<10) |
◆ DQL_CLI_STAT1_ACEX
| #define DQL_CLI_STAT1_ACEX (1UL<<17) |
◆ DQL_CLI_STAT1_CALEN
| #define DQL_CLI_STAT1_CALEN (1UL<<21) |
◆ DQL_CLI_STAT1_CDORD
| #define DQL_CLI_STAT1_CDORD (1UL<<26) |
◆ DQL_CLI_STAT1_CLKINT1
| #define DQL_CLI_STAT1_CLKINT1 (1UL<<23) |
◆ DQL_CLI_STAT1_CYCLONE
| #define DQL_CLI_STAT1_CYCLONE (1UL<<16) |
◆ DQL_CLI_STAT1_CYCLONE2
| #define DQL_CLI_STAT1_CYCLONE2 (1UL<<25) |
◆ DQL_CLI_STAT1_ENCLI
| #define DQL_CLI_STAT1_ENCLI (1UL<<6) |
◆ DQL_CLI_STAT1_ENCLO
| #define DQL_CLI_STAT1_ENCLO (1UL<<5) |
◆ DQL_CLI_STAT1_ENISRD
| #define DQL_CLI_STAT1_ENISRD (1UL<<8) |
◆ DQL_CLI_STAT1_ENISWR
| #define DQL_CLI_STAT1_ENISWR (1UL<<9) |
◆ DQL_CLI_STAT1_ENPWM
| #define DQL_CLI_STAT1_ENPWM (1UL<<7) |
◆ DQL_CLI_STAT1_ICDR
| #define DQL_CLI_STAT1_ICDR (1UL<<22) |
◆ DQL_CLI_STAT1_IFAE
| #define DQL_CLI_STAT1_IFAE (1UL<<19) |
◆ DQL_CLI_STAT1_IS11
| #define DQL_CLI_STAT1_IS11 (1UL<<14) |
◆ DQL_CLI_STAT1_IS16_5
| #define DQL_CLI_STAT1_IS16_5 (1UL<<13) |
◆ DQL_CLI_STAT1_IS33
| #define DQL_CLI_STAT1_IS33 (1UL<<12) |
◆ DQL_CLI_STAT1_IS66
| #define DQL_CLI_STAT1_IS66 (1UL<<11) |
◆ DQL_CLI_STAT1_LERS
| #define DQL_CLI_STAT1_LERS (1UL<<24) |
◆ DQL_CLI_STAT1_NOEPROM
| #define DQL_CLI_STAT1_NOEPROM (1UL<<18) |
◆ DQL_CLI_STAT1_NOEXT
| #define DQL_CLI_STAT1_NOEXT (1UL<<15) |
◆ DQL_CLI_STAT1_NOIS
| #define DQL_CLI_STAT1_NOIS (1UL<<2) |
◆ DQL_CLI_STAT1_NOSPD
| #define DQL_CLI_STAT1_NOSPD (1UL<<4) |
◆ DQL_CLI_STAT1_NOSYNC
| #define DQL_CLI_STAT1_NOSYNC (1UL<<1) |
◆ DQL_CLI_STAT1_NOTEST
| #define DQL_CLI_STAT1_NOTEST (1UL<<0) |
◆ DQL_CLI_STAT1_NOTRIG
| #define DQL_CLI_STAT1_NOTRIG (1UL<<3) |
◆ DQL_CLI_STAT1_SCOUNT
| #define DQL_CLI_STAT1_SCOUNT (1UL<<20) |
◆ DQL_CLI_STAT2
| #define DQL_CLI_STAT2 (0x0038) |
◆ DQL_CLI_STAT2_ADDR16MASK
| #define DQL_CLI_STAT2_ADDR16MASK (0x0000ffff) |
◆ DQL_CLI_STAT2_DATA16MASK
| #define DQL_CLI_STAT2_DATA16MASK (0xffff0000) |
◆ DQL_CLI_STAT3
| #define DQL_CLI_STAT3 (0x003C) |
◆ DQL_CLI_SYNCE
| #define DQL_CLI_SYNCE (0x00BC) |
◆ DQL_CLI_SYNCS
| #define DQL_CLI_SYNCS (0x0080) |
◆ DQL_CLI_TMR0C
| #define DQL_CLI_TMR0C (0x00A4) |
◆ DQL_CLI_TMR0D
| #define DQL_CLI_TMR0D (0x00A0) |
◆ DQL_CLI_TMR1C
| #define DQL_CLI_TMR1C (0x00AC) |
◆ DQL_CLI_TMR1D
| #define DQL_CLI_TMR1D (0x00A8) |
◆ DQL_CLI_TMRCFG
| #define DQL_CLI_TMRCFG (0x00B0) |
◆ DQL_CLI_TPCFG
| #define DQL_CLI_TPCFG (0x009C) |
◆ DQL_CLI_TSCFG
| #define DQL_CLI_TSCFG (0x0098) |
◆ DQL_CLI_TSTD
| #define DQL_CLI_TSTD (0x00B8) |
◆ DQL_CLI_TSTV
| #define DQL_CLI_TSTV (0x00B8) |
◆ DQL_CLIS_CL_2CLK
| #define DQL_CLIS_CL_2CLK (1UL<<13) |
◆ DQL_CLIS_CL_EDGE
| #define DQL_CLIS_CL_EDGE (1UL<<12) |
◆ DQL_CLIS_CL_NOTRIG
| #define DQL_CLIS_CL_NOTRIG (1UL<<14) |
◆ DQL_CLIS_CL_SRC0
| #define DQL_CLIS_CL_SRC0 (8) |
◆ DQL_CLIS_CL_SRC1
| #define DQL_CLIS_CL_SRC1 (9) |
◆ DQL_CLIS_CL_SRC2
| #define DQL_CLIS_CL_SRC2 (10) |
◆ DQL_CLIS_CL_SRC3
| #define DQL_CLIS_CL_SRC3 (11) |
◆ DQL_CLIS_CV_2CLK
| #define DQL_CLIS_CV_2CLK (1UL<<5) |
◆ DQL_CLIS_CV_EDGE
| #define DQL_CLIS_CV_EDGE (1UL<<4) |
◆ DQL_CLIS_CV_NOTRIG
| #define DQL_CLIS_CV_NOTRIG (1UL<<6) |
◆ DQL_CLIS_CV_SRC0
| #define DQL_CLIS_CV_SRC0 (0) |
◆ DQL_CLIS_CV_SRC1
| #define DQL_CLIS_CV_SRC1 (1) |
◆ DQL_CLIS_CV_SRC2
| #define DQL_CLIS_CV_SRC2 (2) |
◆ DQL_CLIS_CV_SRC3
| #define DQL_CLIS_CV_SRC3 (3) |
◆ DQL_CLIS_CVR
| #define DQL_CLIS_CVR (1UL<<15) |
◆ DQL_CLIS_SRC_CROSS
| #define DQL_CLIS_SRC_CROSS (0x2) |
◆ DQL_CLIS_SRC_EXT0
| #define DQL_CLIS_SRC_EXT0 (0x4) |
◆ DQL_CLIS_SRC_EXT1
| #define DQL_CLIS_SRC_EXT1 (0x5) |
◆ DQL_CLIS_SRC_INTER0
| #define DQL_CLIS_SRC_INTER0 (0x8) |
◆ DQL_CLIS_SRC_INTER1
| #define DQL_CLIS_SRC_INTER1 (0x9) |
◆ DQL_CLIS_SRC_SW
| #define DQL_CLIS_SRC_SW (0x0) |
◆ DQL_CLIS_SRC_SYNC0
| #define DQL_CLIS_SRC_SYNC0 (0xC) |
◆ DQL_CLIS_SRC_SYNC1
| #define DQL_CLIS_SRC_SYNC1 (0xD) |
◆ DQL_CLIS_SRC_SYNC2
| #define DQL_CLIS_SRC_SYNC2 (0xE) |
◆ DQL_CLIS_SRC_SYNC3
| #define DQL_CLIS_SRC_SYNC3 (0xF) |
◆ DQL_CLIS_SRC_TB
| #define DQL_CLIS_SRC_TB (0x6) |
◆ DQL_CLIS_SRC_TMR0
| #define DQL_CLIS_SRC_TMR0 (0x1) |
◆ DQL_CLIS_SRC_TMR1
| #define DQL_CLIS_SRC_TMR1 (0x3) |
◆ DQL_EE_DLY
| #define DQL_EE_DLY 10 |
◆ DQL_EE_EDLY
◆ DQL_EE_EDR
| #define DQL_EE_EDR 0x80000000 |
◆ DQL_EE_ERAL
| #define DQL_EE_ERAL | ( | ) | ((1UL<<21)|(2UL<<17)) |
◆ DQL_EE_ERASE
| #define DQL_EE_ERASE | ( | A | ) | ((1UL<<21)|(3UL<<19)|((A&0x7FF)<<8)) |
◆ DQL_EE_READ
| #define DQL_EE_READ | ( | A | ) | ((1UL<<21)|(2UL<<19)|((A&0x7FF)<<8)) |
◆ DQL_EE_WDS
| #define DQL_EE_WDS | ( | ) | ((1UL<<21)) |
◆ DQL_EE_WEN
| #define DQL_EE_WEN | ( | ) | ((1UL<<21)|(3UL<<17)) |
◆ DQL_EE_WRITE
| #define DQL_EE_WRITE | ( | A, | |
| D | |||
| ) | ((1UL<<21)|(1UL<<19)|((A&0x7FF)<<8)|(D&0xFF)) |
◆ DQL_EE_WRITEALL
| #define DQL_EE_WRITEALL | ( | D | ) | ((1UL<<21)|(1UL<<17)|(D&0xFF)) |
◆ DQL_ESCFG_MODE0
| #define DQL_ESCFG_MODE0 (1UL<<7) |
◆ DQL_ESCFG_MODE1
| #define DQL_ESCFG_MODE1 (1UL<<15) |
◆ DQL_ESCFG_MODE2
| #define DQL_ESCFG_MODE2 (1UL<<23) |
◆ DQL_ESCFG_MODE3
| #define DQL_ESCFG_MODE3 (1UL<<31) |
◆ DQL_ESCFG_SRC00
| #define DQL_ESCFG_SRC00 (0) |
◆ DQL_ESCFG_SRC01
| #define DQL_ESCFG_SRC01 (1) |
◆ DQL_ESCFG_SRC02
| #define DQL_ESCFG_SRC02 (2) |
◆ DQL_ESCFG_SRC03
| #define DQL_ESCFG_SRC03 (3) |
◆ DQL_ESCFG_SRC10
| #define DQL_ESCFG_SRC10 (8) |
◆ DQL_ESCFG_SRC11
| #define DQL_ESCFG_SRC11 (9) |
◆ DQL_ESCFG_SRC12
| #define DQL_ESCFG_SRC12 (10) |
◆ DQL_ESCFG_SRC13
| #define DQL_ESCFG_SRC13 (11) |
◆ DQL_ESCFG_SRC20
| #define DQL_ESCFG_SRC20 (16) |
◆ DQL_ESCFG_SRC21
| #define DQL_ESCFG_SRC21 (17) |
◆ DQL_ESCFG_SRC22
| #define DQL_ESCFG_SRC22 (18) |
◆ DQL_ESCFG_SRC23
| #define DQL_ESCFG_SRC23 (19) |
◆ DQL_ESCFG_SRC30
| #define DQL_ESCFG_SRC30 (24) |
◆ DQL_ESCFG_SRC31
| #define DQL_ESCFG_SRC31 (25) |
◆ DQL_ESCFG_SRC32
| #define DQL_ESCFG_SRC32 (26) |
◆ DQL_ESCFG_SRC33
| #define DQL_ESCFG_SRC33 (27) |
◆ DQL_ESCFG_SRC_CLICL
| #define DQL_ESCFG_SRC_CLICL (0x1) |
◆ DQL_ESCFG_SRC_CLICV
| #define DQL_ESCFG_SRC_CLICV (0x2) |
◆ DQL_ESCFG_SRC_CLOCL
| #define DQL_ESCFG_SRC_CLOCL (0x3) |
◆ DQL_ESCFG_SRC_CLOCV
| #define DQL_ESCFG_SRC_CLOCV (0x4) |
◆ DQL_ESCFG_SRC_EXT0
| #define DQL_ESCFG_SRC_EXT0 (0x5) |
◆ DQL_ESCFG_SRC_EXT1
| #define DQL_ESCFG_SRC_EXT1 (0x6) |
◆ DQL_ESCFG_SRC_ONE
| #define DQL_ESCFG_SRC_ONE (0xC) |
◆ DQL_ESCFG_SRC_STPT
| #define DQL_ESCFG_SRC_STPT (0x8) |
◆ DQL_ESCFG_SRC_STRT
| #define DQL_ESCFG_SRC_STRT (0x7) |
◆ DQL_ESCFG_SRC_TB
| #define DQL_ESCFG_SRC_TB (0x0) |
◆ DQL_ESCFG_SRC_TMR0P
| #define DQL_ESCFG_SRC_TMR0P (0x9) |
◆ DQL_ESCFG_SRC_TMR1P
| #define DQL_ESCFG_SRC_TMR1P (0xA) |
◆ DQL_ESCFG_SRC_ZERO
| #define DQL_ESCFG_SRC_ZERO (0xB) |
◆ DQL_IFAR_ONECLOCK
| #define DQL_IFAR_ONECLOCK (0x80000000) |
◆ DQL_IFIL_OFIL
| #define DQL_IFIL_OFIL | ( | FF, | |
| FH | |||
| ) | (((FF)<<DQL_CLI_IFIL_FFMASK0) | ((FH)&DQL_CLI_IFIL_FHMASK)) |
◆ DQL_IR_CAN0
| #define DQL_IR_CAN0 (1UL<<0) |
◆ DQL_IR_CAN1
| #define DQL_IR_CAN1 (1UL<<1) |
◆ DQL_IR_CAN2
| #define DQL_IR_CAN2 (1UL<<2) |
◆ DQL_IR_CAN3
| #define DQL_IR_CAN3 (1UL<<3) |
◆ DQL_IR_CTU0
| #define DQL_IR_CTU0 (1UL<<0) |
◆ DQL_IR_CTU1
| #define DQL_IR_CTU1 (1UL<<1) |
◆ DQL_IR_CTU2
| #define DQL_IR_CTU2 (1UL<<2) |
◆ DQL_IR_CTU3
| #define DQL_IR_CTU3 (1UL<<3) |
◆ DQL_IR_CTU4
| #define DQL_IR_CTU4 (1UL<<4) |
◆ DQL_IR_CTU5
| #define DQL_IR_CTU5 (1UL<<5) |
◆ DQL_IR_CTU6
| #define DQL_IR_CTU6 (1UL<<6) |
◆ DQL_IR_CTU7
| #define DQL_IR_CTU7 (1UL<<7) |
◆ DQL_IR_DII
| #define DQL_IR_DII (1UL<<0) |
◆ DQL_IR_EDI
| #define DQL_IR_EDI (1UL<<29) |
◆ DQL_IR_ERI
| #define DQL_IR_ERI (1UL<<28) |
◆ DQL_IR_ICI
| #define DQL_IR_ICI (1UL<<25) |
◆ DQL_IR_IDI
| #define DQL_IR_IDI (1UL<<27) |
◆ DQL_IR_IFF
| #define DQL_IR_IFF (1UL<<30) |
◆ DQL_IR_IFI
| #define DQL_IR_IFI (1UL<<31) |
◆ DQL_IR_IOI
| #define DQL_IR_IOI (1UL<<23) |
◆ DQL_IR_IRI
| #define DQL_IR_IRI (1UL<<26) |
◆ DQL_IR_OCI
| #define DQL_IR_OCI (1UL<<24) |
◆ DQL_IR_OFE
| #define DQL_IR_OFE (1UL<<19) |
◆ DQL_IR_OFI
| #define DQL_IR_OFI (1UL<<20) |
◆ DQL_IR_OUCI
| #define DQL_IR_OUCI (1UL<<0) |
◆ DQL_IR_OUI
| #define DQL_IR_OUI (1UL<<22) |
◆ DQL_IR_P1RX
| #define DQL_IR_P1RX (1UL<<1) |
◆ DQL_IR_P1TO
| #define DQL_IR_P1TO (1UL<<3) |
◆ DQL_IR_P1TX
| #define DQL_IR_P1TX (1UL<<0) |
◆ DQL_IR_P1UI
| #define DQL_IR_P1UI (1UL<<2) |
◆ DQL_IR_P2RX
| #define DQL_IR_P2RX (1UL<<5) |
◆ DQL_IR_P2TO
| #define DQL_IR_P2TO (1UL<<7) |
◆ DQL_IR_P2TX
| #define DQL_IR_P2TX (1UL<<4) |
◆ DQL_IR_P2UI
| #define DQL_IR_P2UI (1UL<<6) |
◆ DQL_IR_P3RX
| #define DQL_IR_P3RX (1UL<<9) |
◆ DQL_IR_P3TO
| #define DQL_IR_P3TO (1UL<<11) |
◆ DQL_IR_P3TX
| #define DQL_IR_P3TX (1UL<<8) |
◆ DQL_IR_P3UI
| #define DQL_IR_P3UI (1UL<<10) |
◆ DQL_IR_P4RX
| #define DQL_IR_P4RX (1UL<<13) |
◆ DQL_IR_P4TO
| #define DQL_IR_P4TO (1UL<<15) |
◆ DQL_IR_P4TX
| #define DQL_IR_P4TX (1UL<<12) |
◆ DQL_IR_P4UI
| #define DQL_IR_P4UI (1UL<<14) |
◆ DQL_IR_SPT
| #define DQL_IR_SPT (1UL<<17) |
◆ DQL_IR_STT
| #define DQL_IR_STT (1UL<<18) |
◆ DQL_IR_TI
| #define DQL_IR_TI (1UL<<21) |
◆ DQL_IR_TMR1
| #define DQL_IR_TMR1 (1UL<<16) |
◆ DQL_ISOS_INT0_SRC0
| #define DQL_ISOS_INT0_SRC0 (0) |
◆ DQL_ISOS_INT0_SRC1
| #define DQL_ISOS_INT0_SRC1 (1) |
◆ DQL_ISOS_INT0_SRC2
| #define DQL_ISOS_INT0_SRC2 (2) |
◆ DQL_ISOS_INT0_SRC3
| #define DQL_ISOS_INT0_SRC3 (3) |
◆ DQL_ISOS_INT1_SRC0
| #define DQL_ISOS_INT1_SRC0 (8) |
◆ DQL_ISOS_INT1_SRC1
| #define DQL_ISOS_INT1_SRC1 (9) |
◆ DQL_ISOS_INT1_SRC2
| #define DQL_ISOS_INT1_SRC2 (10) |
◆ DQL_ISOS_INT1_SRC3
| #define DQL_ISOS_INT1_SRC3 (11) |
◆ DQL_ISOS_SRC_0
| #define DQL_ISOS_SRC_0 (0x0) |
◆ DQL_ISOS_SRC_1
| #define DQL_ISOS_SRC_1 (0x2) |
◆ DQL_ISOS_SRC_CLICL
| #define DQL_ISOS_SRC_CLICL (0x6) |
◆ DQL_ISOS_SRC_CLICV
| #define DQL_ISOS_SRC_CLICV (0x5) |
◆ DQL_ISOS_SRC_CLOCL
| #define DQL_ISOS_SRC_CLOCL (0x8) |
◆ DQL_ISOS_SRC_CLOCV
| #define DQL_ISOS_SRC_CLOCV (0x7) |
◆ DQL_ISOS_SRC_PBUTN
| #define DQL_ISOS_SRC_PBUTN (0x4) |
◆ DQL_ISOS_SRC_STPT
| #define DQL_ISOS_SRC_STPT (0xB) |
◆ DQL_ISOS_SRC_STRT
| #define DQL_ISOS_SRC_STRT (0xA) |
◆ DQL_ISOS_SRC_SYNC0
| #define DQL_ISOS_SRC_SYNC0 (0xC) |
◆ DQL_ISOS_SRC_SYNC1
| #define DQL_ISOS_SRC_SYNC1 (0xD) |
◆ DQL_ISOS_SRC_SYNC2
| #define DQL_ISOS_SRC_SYNC2 (0xE) |
◆ DQL_ISOS_SRC_SYNC3
| #define DQL_ISOS_SRC_SYNC3 (0xF) |
◆ DQL_ISOS_SRC_TB
| #define DQL_ISOS_SRC_TB (0x9) |
◆ DQL_ISOS_SRC_TMR0C
| #define DQL_ISOS_SRC_TMR0C (0x1) |
◆ DQL_ISOS_SRC_TMR1C
| #define DQL_ISOS_SRC_TMR1C (0x3) |
◆ DQL_LCR201_DCDIS
| #define DQL_LCR201_DCDIS (1UL<<0) |
◆ DQL_LCR205_FCLR
| #define DQL_LCR205_FCLR (1UL<<2) |
◆ DQL_LCR205_LED
| #define DQL_LCR205_LED (1UL<<1) |
◆ DQL_LCR205_MRE
| #define DQL_LCR205_MRE (1UL<<6) |
◆ DQL_LCR205_SEL0
| #define DQL_LCR205_SEL0 (1UL<<4) |
◆ DQL_LCR205_SEL1
| #define DQL_LCR205_SEL1 (1UL<<5) |
◆ DQL_LCR403_EN
| #define DQL_LCR403_EN (1UL<<0) |
◆ DQL_LCR501_LED
| #define DQL_LCR501_LED (1UL<<1) |
◆ DQL_LCR501_P1RST
| #define DQL_LCR501_P1RST (1UL<<2) |
◆ DQL_LCR501_P2RST
| #define DQL_LCR501_P2RST (1UL<<3) |
◆ DQL_LCR501_P3RST
| #define DQL_LCR501_P3RST (1UL<<4) |
◆ DQL_LCR501_P4RST
| #define DQL_LCR501_P4RST (1UL<<5) |
◆ DQL_LCR508_P1RST
| #define DQL_LCR508_P1RST (1UL<<2) |
◆ DQL_LCR508_P2RST
| #define DQL_LCR508_P2RST (1UL<<3) |
◆ DQL_LCR508_P3RST
| #define DQL_LCR508_P3RST (1UL<<4) |
◆ DQL_LCR508_P4RST
| #define DQL_LCR508_P4RST (1UL<<5) |
◆ DQL_LCR508_P5RST
| #define DQL_LCR508_P5RST (1UL<<6) |
◆ DQL_LCR508_P6RST
| #define DQL_LCR508_P6RST (1UL<<7) |
◆ DQL_LCR508_P7RST
| #define DQL_LCR508_P7RST (1UL<<8) |
◆ DQL_LCR508_P8RST
| #define DQL_LCR508_P8RST (1UL<<9) |
◆ DQL_LCR_401_LED
| #define DQL_LCR_401_LED (1UL<<1) |
◆ DQL_LCR_416_DCEN
| #define DQL_LCR_416_DCEN (1UL<<0) |
◆ DQL_LCR_416_LED
| #define DQL_LCR_416_LED (1UL<<1) |
◆ DQL_LCR_CLIF
| #define DQL_LCR_CLIF (1UL<<23) |
◆ DQL_LCR_CLOF
| #define DQL_LCR_CLOF (1UL<<22) |
◆ DQL_LCR_CLOM
| #define DQL_LCR_CLOM (1UL<<25) |
◆ DQL_LCR_CLOR
| #define DQL_LCR_CLOR (1UL<<21) |
◆ DQL_LCR_ICCE
| #define DQL_LCR_ICCE (1UL<<27) |
◆ DQL_LCR_ICLD
| #define DQL_LCR_ICLD (1UL<<24) |
◆ DQL_LCR_ICLE
| #define DQL_LCR_ICLE (1UL<<29) |
◆ DQL_LCR_LIOE
| #define DQL_LCR_LIOE (1UL<<31) |
◆ DQL_LCR_LRE
| #define DQL_LCR_LRE (1UL<<30) |
◆ DQL_LCR_OCCE
| #define DQL_LCR_OCCE (1UL<<26) |
◆ DQL_LCR_OCLE
| #define DQL_LCR_OCLE (1UL<<28) |
◆ DQL_LCR_RST
| #define DQL_LCR_RST (1UL<<20) |
◆ DQL_LCR_TA_EN
| #define DQL_LCR_TA_EN (1UL<<19) |
◆ DQL_LSR_BSY
| #define DQL_LSR_BSY (1UL<<31) |
◆ DQL_LSR_EDR
| #define DQL_LSR_EDR (1UL<<29) |
◆ DQL_LSR_EIB
| #define DQL_LSR_EIB (1UL<<28) |
◆ DQL_LSR_EXT0
| #define DQL_LSR_EXT0 (1UL<<22) |
◆ DQL_LSR_EXT1
| #define DQL_LSR_EXT1 (1UL<<23) |
◆ DQL_LSR_EXT_POS
| #define DQL_LSR_EXT_POS (22) |
◆ DQL_LSR_IBR
| #define DQL_LSR_IBR (1UL<<25) |
◆ DQL_LSR_IBT
| #define DQL_LSR_IBT (1UL<<26) |
◆ DQL_LSR_IDR
| #define DQL_LSR_IDR (1UL<<27) |
◆ DQL_LSR_ILS
| #define DQL_LSR_ILS (1UL<<30) |
◆ DQL_LSR_INT0
| #define DQL_LSR_INT0 (1UL<<20) |
◆ DQL_LSR_INT1
| #define DQL_LSR_INT1 (1UL<<21) |
◆ DQL_LSR_LES
| #define DQL_LSR_LES (1UL<<24) |
◆ DQL_SL508_IRQ
| #define DQL_SL508_IRQ (1UL<<0) |
◆ DQL_STAT0_FINSIZE
| #define DQL_STAT0_FINSIZE | ( | VAL | ) | ((VAL&DQL_CLI_STAT0_FINMASK)>>16) |
◆ DQL_STAT0_FOUTSIZE
| #define DQL_STAT0_FOUTSIZE | ( | VAL | ) | (VAL&DQL_CLI_STAT0_FOUMASK) |
◆ DQL_STAT1_2WIRE
| #define DQL_STAT1_2WIRE | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_2WIRE)>>10) |
◆ DQL_STAT1_ACEX
| #define DQL_STAT1_ACEX | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ACEX)>>17) |
◆ DQL_STAT1_CALEN
| #define DQL_STAT1_CALEN | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_CALEN)>>21) |
◆ DQL_STAT1_CDORD
| #define DQL_STAT1_CDORD | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_CDORD)>>26) |
◆ DQL_STAT1_CLKINT1
| #define DQL_STAT1_CLKINT1 | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_CLKINT1)>>23) |
◆ DQL_STAT1_CYCLONE
| #define DQL_STAT1_CYCLONE | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_CYCLONE)>>16) |
◆ DQL_STAT1_CYCLONE2
| #define DQL_STAT1_CYCLONE2 | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_CYCLONE2)>>25) |
◆ DQL_STAT1_ENCLI
| #define DQL_STAT1_ENCLI | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ENCLI)>>6) |
◆ DQL_STAT1_ENCLO
| #define DQL_STAT1_ENCLO | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ENCLO)>>5) |
◆ DQL_STAT1_ENISRD
| #define DQL_STAT1_ENISRD | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ENISRD)>>8) |
◆ DQL_STAT1_ENISWR
| #define DQL_STAT1_ENISWR | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ENISWR)>>9) |
◆ DQL_STAT1_ENPWM
| #define DQL_STAT1_ENPWM | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ENPWM)>>7) |
◆ DQL_STAT1_ICDR
| #define DQL_STAT1_ICDR | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_ICDR)>>22) |
◆ DQL_STAT1_IFAE
| #define DQL_STAT1_IFAE | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_IFAE)>>19) |
◆ DQL_STAT1_IS11
| #define DQL_STAT1_IS11 | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_IS11)>>14) |
◆ DQL_STAT1_IS16_5
| #define DQL_STAT1_IS16_5 | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_IS16_5)>>13) |
◆ DQL_STAT1_IS33
| #define DQL_STAT1_IS33 | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_IS33)>>12) |
◆ DQL_STAT1_IS66
| #define DQL_STAT1_IS66 | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_IS66)>>11) |
◆ DQL_STAT1_LERS
| #define DQL_STAT1_LERS | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_LERS)>>24) |
◆ DQL_STAT1_NOEPROM
| #define DQL_STAT1_NOEPROM | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOEPROM)>>18) |
◆ DQL_STAT1_NOEXT
| #define DQL_STAT1_NOEXT | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOEXT )>>15) |
◆ DQL_STAT1_NOIS
| #define DQL_STAT1_NOIS | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOIS)>>2) |
◆ DQL_STAT1_NOSPD
| #define DQL_STAT1_NOSPD | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOSPD)>>4) |
◆ DQL_STAT1_NOSYNC
| #define DQL_STAT1_NOSYNC | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOSYNC)>>1) |
◆ DQL_STAT1_NOTEST
| #define DQL_STAT1_NOTEST | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOTEST)>>0) |
◆ DQL_STAT1_NOTRIG
| #define DQL_STAT1_NOTRIG | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_NOTRIG)>>3) |
◆ DQL_STAT1_SCOUNT
| #define DQL_STAT1_SCOUNT | ( | VAL | ) | ((VAL& DQL_CLI_STAT1_SCOUNT)>>20) |
◆ DQL_STAT2_ADDR16
| #define DQL_STAT2_ADDR16 | ( | VAL | ) | (VAL&DQL_CLI_STAT2_ADDR16MASK) |
◆ DQL_STAT2_DATA16
| #define DQL_STAT2_DATA16 | ( | VAL | ) | ((VAL&DQL_CLI_STAT2_DATA16MASK)>>16) |
◆ DQL_SYNC_LINES
| #define DQL_SYNC_LINES (4) |
◆ DQL_TMRCFG_MODE_CNT
| #define DQL_TMRCFG_MODE_CNT (0) |
◆ DQL_TMRCFG_MODE_PWM
| #define DQL_TMRCFG_MODE_PWM (1) |
◆ DQL_TMRCFG_TMR0_ENABLE
| #define DQL_TMRCFG_TMR0_ENABLE (1UL<<3) |
◆ DQL_TMRCFG_TMR0_INV
| #define DQL_TMRCFG_TMR0_INV (1UL<<2) |
◆ DQL_TMRCFG_TMR0_MODE0
| #define DQL_TMRCFG_TMR0_MODE0 (1UL<<0) |
◆ DQL_TMRCFG_TMR0_MODE1
| #define DQL_TMRCFG_TMR0_MODE1 (1UL<<1) |
◆ DQL_TMRCFG_TMR1_ENABLE
| #define DQL_TMRCFG_TMR1_ENABLE (1UL<<7) |
◆ DQL_TMRCFG_TMR1_INV
| #define DQL_TMRCFG_TMR1_INV (1UL<<6) |
◆ DQL_TMRCFG_TMR1_MODE0
| #define DQL_TMRCFG_TMR1_MODE0 (1UL<<4) |
◆ DQL_TMRCFG_TMR1_MODE1
| #define DQL_TMRCFG_TMR1_MODE1 (1UL<<5) |
◆ DQL_TRANSFER_DLY
| #define DQL_TRANSFER_DLY 9 |
◆ DQL_TSCFG_EDGE
| #define DQL_TSCFG_EDGE (4) |
◆ DQL_TSCFG_SRC0
| #define DQL_TSCFG_SRC0 (0) |
◆ DQL_TSCFG_SRC1
| #define DQL_TSCFG_SRC1 (1) |
◆ DQL_TSCFG_SRC2
| #define DQL_TSCFG_SRC2 (2) |
◆ DQL_TSCFG_SRC3
| #define DQL_TSCFG_SRC3 (3) |
◆ DQL_TSCFG_SRC_EXT0
| #define DQL_TSCFG_SRC_EXT0 (0x4) |
◆ DQL_TSCFG_SRC_EXT1
| #define DQL_TSCFG_SRC_EXT1 (0x5) |
◆ DQL_TSCFG_SRC_NA
| #define DQL_TSCFG_SRC_NA (0x0) |
◆ DQL_TSCFG_SRC_PB
| #define DQL_TSCFG_SRC_PB (0x7) |
◆ DQL_TSCFG_SRC_SW
| #define DQL_TSCFG_SRC_SW (0x1) |
◆ DQL_TSCFG_SRC_SYNC0
| #define DQL_TSCFG_SRC_SYNC0 (0xC) |
◆ DQL_TSCFG_SRC_SYNC1
| #define DQL_TSCFG_SRC_SYNC1 (0xD) |
◆ DQL_TSCFG_SRC_SYNC2
| #define DQL_TSCFG_SRC_SYNC2 (0xE) |
◆ DQL_TSCFG_SRC_SYNC3
| #define DQL_TSCFG_SRC_SYNC3 (0xF) |
◆ DQL_TSCFG_SRC_TB
| #define DQL_TSCFG_SRC_TB (0x6) |
◆ DQRDWRLST
| #define DQRDWRLST uint32 |
◆ HEAPBUFSIZE
| #define HEAPBUFSIZE (64*1024*1024) |
◆ OPTION_LINUX
| #define OPTION_LINUX 0x00100000 |
◆ OPTION_LOGGER
| #define OPTION_LOGGER 0x00800400 |
◆ OPTION_SIMULINK
| #define OPTION_SIMULINK 0x00100001 |
◆ PORT_ETH
| #define PORT_ETH 0 |
◆ PORT_IRDA
| #define PORT_IRDA 2 |
◆ PORT_UART
| #define PORT_UART 1 |
◆ PORT_USB
| #define PORT_USB 3 |
◆ PROT_DQTS
| #define PROT_DQTS 0 |
◆ PROT_DQVT
| #define PROT_DQVT 1 |
◆ PROT_TCPIP
| #define PROT_TCPIP 2 |
◆ PROT_USB
| #define PROT_USB 3 |
◆ RWLSTSIZE
| #define RWLSTSIZE 256 |
◆ TYPE_AUTO
| #define TYPE_AUTO 0x4 |
◆ TYPE_DL
| #define TYPE_DL 0x10 |
◆ TYPE_IOM
| #define TYPE_IOM 0x2 |
◆ TYPE_MODBUS
| #define TYPE_MODBUS 0x24 |
◆ TYPE_PAC
| #define TYPE_PAC 0x20 |
◆ TYPE_SA
| #define TYPE_SA 0x8 |
◆ TYPE_SIMU
| #define TYPE_SIMU 0x28 |
◆ USE_VALLOC
| #define USE_VALLOC |
