|
#define | GSC_DRIVER_VERSION DEV_VERSION "." GSC_COMMON_VERSION |
|
#define | GSC_COMMON_VERSION "32" |
|
#define | ARRAY_ELEMENTS(a) (sizeof((a))/sizeof((a)[0])) |
|
#define | MS_TO_JIFFIES(m) (((m) + ((1000 / HZ) - 1)) / (1000 / HZ)) |
|
#define | JIFFIES_TO_MS(j) ((((j) * 1000) + (HZ / 2)) / HZ) |
|
#define | _1K (1024L) |
|
#define | _5K (_1K * 5) |
|
#define | _30K (_1K * 30) |
|
#define | _32K (_1K * 32) |
|
#define | _64K (_1K * 64) |
|
#define | _220K (_1K * 220L) |
|
#define | _256K (_1K * 256L) |
|
#define | _512K (_1K * 512L) |
|
#define | _1100K (_1K * 1100L) |
|
#define | _1M (_1K * _1K) |
|
#define | _8M (_1M * 8L) |
|
#define | _8MHZ ( 8000000L) |
|
#define | _9_6MHZ ( 9600000L) |
|
#define | _16MHZ (16000000L) |
|
#define | _19_2MHZ (19200000L) |
|
#define | _38_4MHZ (38400000L) |
|
#define | D0 0x00000001 |
|
#define | D1 0x00000002 |
|
#define | D2 0x00000004 |
|
#define | D3 0x00000008 |
|
#define | D4 0x00000010 |
|
#define | D5 0x00000020 |
|
#define | D6 0x00000040 |
|
#define | D7 0x00000080 |
|
#define | D8 0x00000100 |
|
#define | D9 0x00000200 |
|
#define | D10 0x00000400 |
|
#define | D11 0x00000800 |
|
#define | D12 0x00001000 |
|
#define | D13 0x00002000 |
|
#define | D14 0x00004000 |
|
#define | D15 0x00008000 |
|
#define | D16 0x00010000 |
|
#define | D17 0x00020000 |
|
#define | D18 0x00040000 |
|
#define | D19 0x00080000 |
|
#define | D20 0x00100000 |
|
#define | D21 0x00200000 |
|
#define | D22 0x00400000 |
|
#define | D23 0x00800000 |
|
#define | D24 0x01000000 |
|
#define | D25 0x02000000 |
|
#define | D26 0x04000000 |
|
#define | D27 0x08000000 |
|
#define | D28 0x10000000 |
|
#define | D29 0x20000000 |
|
#define | D30 0x40000000 |
|
#define | D31 0x80000000 |
|
#define | GSC_VADDR(d, o) (VADDR_T) (((u8*) (d)->gsc.vaddr) + (o)) |
|
#define | PLX_VADDR(d, o) (VADDR_T) (((u8*) (d)->plx.vaddr) + (o)) |
|
#define | GSC_DMA_CSR_DISABLE GSC_FIELD_ENCODE(0,0,0) |
|
#define | GSC_DMA_CSR_ENABLE GSC_FIELD_ENCODE(1,0,0) |
|
#define | GSC_DMA_CSR_START GSC_FIELD_ENCODE(1,1,1) |
|
#define | GSC_DMA_CSR_ABORT GSC_FIELD_ENCODE(1,2,2) |
|
#define | GSC_DMA_CSR_CLEAR GSC_FIELD_ENCODE(1,3,3) |
|
#define | GSC_DMA_CSR_DONE GSC_FIELD_ENCODE(1,4,4) |
|
#define | GSC_DMA_CAP_DMA_READ 0x01 |
|
#define | GSC_DMA_CAP_DMA_WRITE 0x02 |
|
#define | GSC_DMA_CAP_DMDMA_READ 0x04 |
|
#define | GSC_DMA_CAP_DMDMA_WRITE 0x08 |
|
#define | GSC_DMA_SEL_STATIC 0x10 |
|
#define | GSC_DMA_SEL_DYNAMIC 0x20 |
|
#define | GSC_DMA_MODE_SIZE_8_BITS GSC_FIELD_ENCODE(0, 1, 0) |
|
#define | GSC_DMA_MODE_SIZE_16_BITS GSC_FIELD_ENCODE(1, 1, 0) |
|
#define | GSC_DMA_MODE_SIZE_32_BITS GSC_FIELD_ENCODE(2, 1, 0) |
|
#define | GSC_DMA_MODE_INPUT_ENABLE GSC_FIELD_ENCODE(1, 6, 6) |
|
#define | GSC_DMA_MODE_BURSTING_LOCAL GSC_FIELD_ENCODE(1, 8, 8) |
|
#define | GSC_DMA_MODE_INTERRUPT_WHEN_DONE GSC_FIELD_ENCODE(1,10,10) |
|
#define | GSC_DMA_MODE_LOCAL_ADRESS_CONSTANT GSC_FIELD_ENCODE(1,11,11) |
|
#define | GSC_DMA_MODE_BLOCK_DMA GSC_FIELD_ENCODE(0,12,12) |
|
#define | GSC_DMA_MODE_DM_DMA GSC_FIELD_ENCODE(1,12,12) |
|
#define | GSC_DMA_MODE_PCI_INTERRUPT_ENABLE GSC_FIELD_ENCODE(1,17,17) |
|
#define | GSC_DMA_DPR_END_OF_CHAIN GSC_FIELD_ENCODE(1,1,1) |
|
#define | GSC_DMA_DPR_TERMINAL_COUNT_IRQ GSC_FIELD_ENCODE(1,2,2) |
|
#define | GSC_DMA_DPR_HOST_TO_BOARD GSC_FIELD_ENCODE(0,3,3) |
|
#define | GSC_DMA_DPR_BOARD_TO_HOST GSC_FIELD_ENCODE(1,3,3) |
|
#define | GSC_INTCSR_MAILBOX_INT_ENABLE GSC_FIELD_ENCODE(1, 3, 3) |
|
#define | GSC_INTCSR_PCI_INT_ENABLE GSC_FIELD_ENCODE(1, 8, 8) |
|
#define | GSC_INTCSR_PCI_DOOR_INT_ENABLE GSC_FIELD_ENCODE(1, 9, 9) |
|
#define | GSC_INTCSR_ABORT_INT_ENABLE GSC_FIELD_ENCODE(1,10,10) |
|
#define | GSC_INTCSR_LOCAL_INT_ENABLE GSC_FIELD_ENCODE(1,11,11) |
|
#define | GSC_INTCSR_PCI_DOOR_INT_ACTIVE GSC_FIELD_ENCODE(1,13,13) |
|
#define | GSC_INTCSR_ABORT_INT_ACTIVE GSC_FIELD_ENCODE(1,14,14) |
|
#define | GSC_INTCSR_LOCAL_INT_ACTIVE GSC_FIELD_ENCODE(1,15,15) |
|
#define | GSC_INTCSR_LOC_DOOR_INT_ENABLE GSC_FIELD_ENCODE(1,17,17) |
|
#define | GSC_INTCSR_DMA_0_INT_ENABLE GSC_FIELD_ENCODE(1,18,18) |
|
#define | GSC_INTCSR_DMA_1_INT_ENABLE GSC_FIELD_ENCODE(1,19,19) |
|
#define | GSC_INTCSR_LOC_DOOR_INT_ACTIVE GSC_FIELD_ENCODE(1,20,20) |
|
#define | GSC_INTCSR_DMA_0_INT_ACTIVE GSC_FIELD_ENCODE(1,21,21) |
|
#define | GSC_INTCSR_DMA_1_INT_ACTIVE GSC_FIELD_ENCODE(1,22,22) |
|
#define | GSC_INTCSR_BIST_INT_ACTIVE GSC_FIELD_ENCODE(1,23,23) |
|
#define | GSC_INTCSR_MAILBOX_INT_ACTIVE GSC_FIELD_ENCODE(0xF,31,28) |
|
#define | GSC_IOCTL_32BIT_ERROR (-1) |
|
#define | GSC_IOCTL_32BIT_NONE 0 |
|
#define | GSC_IOCTL_32BIT_NATIVE 1 |
|
#define | GSC_IOCTL_32BIT_TRANSLATE 2 |
|
#define | GSC_IOCTL_32BIT_COMPAT 3 |
|
#define | GSC_IOCTL_32BIT_DISABLED 4 |
|
#define | S32_MAX (+2147483647L) |
|
#define | GSC_PLX_EEPROM_ACCESS(p) 0 |
|
#define | dev_check_id FAIL FAIL __LINE__ __FILE__ |
|
|
int | gsc_bar_create (struct pci_dev *pci, int index, gsc_bar_t *bar, int mem, int io) |
|
void | gsc_bar_destroy (gsc_bar_t *bar) |
|
int | gsc_close (struct inode *, struct file *) |
|
dev_data_t * | gsc_dev_data_t_locate (struct inode *inode) |
|
int | gsc_ioctl (struct inode *inode, struct file *fp, unsigned int cmd, unsigned long arg) |
|
long | gsc_ioctl_compat (struct file *fp, unsigned int cmd, unsigned long arg) |
|
long | gsc_ioctl_unlocked (struct file *fp, unsigned int cmd, unsigned long arg) |
|
int | gsc_dma_abort_active_xfer (dev_data_t *dev, dev_io_t *io) |
|
void | gsc_dma_close (dev_data_t *dev) |
|
int | gsc_dma_create (dev_data_t *dev, u32 ch0_flags, u32 ch1_flags) |
|
void | gsc_dma_destroy (dev_data_t *dev) |
|
int | gsc_dma_open (dev_data_t *dev) |
|
ssize_t | gsc_dma_perform (dev_data_t *dev, dev_io_t *io, unsigned long jif_end, unsigned int ability, u32 mode, u32 dpr, void *buff, ssize_t samples) |
|
int | gsc_io_create (dev_data_t *dev, dev_io_t *gsc, size_t size) |
|
void | gsc_io_destroy (dev_data_t *dev, dev_io_t *gsc) |
|
int | gsc_ioctl_init (void) |
|
void | gsc_ioctl_reset (void) |
|
int | gsc_irq_access_lock (dev_data_t *dev, int isr) |
|
void | gsc_irq_access_unlock (dev_data_t *dev, int isr) |
|
void | gsc_irq_close (dev_data_t *dev) |
|
int | gsc_irq_create (dev_data_t *dev) |
|
void | gsc_irq_destroy (dev_data_t *dev) |
|
void | gsc_irq_intcsr_mod (dev_data_t *dev, u32 value, u32 mask) |
|
int | gsc_irq_isr_common (int irq, void *dev_id) |
|
int | gsc_irq_local_disable (dev_data_t *dev) |
|
int | gsc_irq_local_enable (dev_data_t *dev) |
|
int | gsc_irq_open (dev_data_t *dev) |
|
void | gsc_module_count_dec (void) |
|
int | gsc_module_count_inc (void) |
|
int | gsc_open (struct inode *, struct file *) |
|
int | gsc_plx_eeprom_access (struct pci_dev *pci) |
|
int | gsc_proc_read (char *page, char **start, off_t offset, int count, int *eof, void *data) |
|
int | gsc_proc_start (void) |
|
void | gsc_proc_stop (void) |
|
ssize_t | gsc_read (struct file *filp, char *buf, size_t count, loff_t *offp) |
|
int | gsc_read_abort_active_xfer (dev_data_t *dev) |
|
ssize_t | gsc_read_pio_work (dev_data_t *dev, char *buff, ssize_t count, unsigned long jif_end) |
|
ssize_t | gsc_read_pio_work_8_bit (dev_data_t *dev, char *buff, ssize_t count, unsigned long jif_end) |
|
ssize_t | gsc_read_pio_work_16_bit (dev_data_t *dev, char *buff, ssize_t count, unsigned long jif_end) |
|
ssize_t | gsc_read_pio_work_32_bit (dev_data_t *dev, char *buff, ssize_t count, unsigned long jif_end) |
|
void | gsc_reg_mod (dev_data_t *dev, u32 reg, u32 val, u32 mask) |
|
int | gsc_reg_mod_ioctl (dev_data_t *dev, gsc_reg_t *arg) |
|
u32 | gsc_reg_read (dev_data_t *dev, u32 reg) |
|
int | gsc_reg_read_ioctl (dev_data_t *dev, gsc_reg_t *arg) |
|
void | gsc_reg_write (dev_data_t *dev, u32 reg, u32 val) |
|
int | gsc_reg_write_ioctl (dev_data_t *dev, gsc_reg_t *arg) |
|
void | gsc_sem_create (gsc_sem_t *sem) |
|
void | gsc_sem_destroy (gsc_sem_t *sem) |
|
int | gsc_sem_lock (gsc_sem_t *sem) |
|
void | gsc_sem_unlock (gsc_sem_t *sem) |
|
long | gsc_time_delta (unsigned long t1, unsigned long t2) |
|
int | gsc_vpd_read_ioctl (dev_data_t *dev, gsc_vpd_t *vpd) |
|
void | gsc_wait_close (dev_data_t *dev) |
|
int | gsc_wait_event (dev_data_t *dev, gsc_wait_t *wait, int(*setup)(dev_data_t *dev, unsigned long arg), unsigned long arg, gsc_sem_t *sem) |
|
int | gsc_wait_resume_io (dev_data_t *dev, u32 io) |
|
int | gsc_wait_resume_irq_alt (dev_data_t *dev, u32 alt) |
|
int | gsc_wait_resume_irq_gsc (dev_data_t *dev, u32 gsc) |
|
int | gsc_wait_resume_irq_main (dev_data_t *dev, u32 main) |
|
int | gsc_write_abort_active_xfer (dev_data_t *dev) |
|
ssize_t | gsc_write (struct file *filp, const char *buf, size_t count, loff_t *offp) |
|
ssize_t | gsc_write_pio_work (dev_data_t *dev, const char *buff, ssize_t count, unsigned long jif_end) |
|
ssize_t | gsc_write_pio_work_8_bit (dev_data_t *dev, const char *buff, ssize_t count, unsigned long jif_end) |
|
ssize_t | gsc_write_pio_work_16_bit (dev_data_t *dev, const char *buff, ssize_t count, unsigned long jif_end) |
|
ssize_t | gsc_write_pio_work_32_bit (dev_data_t *dev, const char *buff, ssize_t count, unsigned long jif_end) |
|
int | dev_close (dev_data_t *dev) |
|
int | dev_device_create (dev_data_t *ref) |
|
void | dev_device_destroy (dev_data_t *dev) |
|
void | dev_irq_isr_local_handler (dev_data_t *dev) |
|
int | dev_open (dev_data_t *dev) |
|
ssize_t | dev_read_startup (dev_data_t *dev) |
|
int | dev_reg_mod_alt (dev_data_t *dev, gsc_reg_t *arg) |
|
int | dev_reg_read_alt (dev_data_t *dev, gsc_reg_t *arg) |
|
int | dev_reg_write_alt (dev_data_t *dev, gsc_reg_t *arg) |
|
int | gsc_wait_cancel_ioctl (dev_data_t *dev, void *arg) |
|
int | gsc_wait_event_ioctl (dev_data_t *dev, void *arg) |
|
int | gsc_wait_status_ioctl (dev_data_t *dev, void *arg) |
|
int | dev_write_startup (dev_data_t *dev) |
|