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Macros
#define	MAX_PCI_BUS 32

#define	MAX_PCI_DEV 32

#define	MAX_PCI_FUNC 8

#define	PCI_NUM_BARS_TYPE_00 7

#define	PCI_NUM_BARS_TYPE_01 2

#define	PCI_NUM_BARS PCI_NUM_BARS_TYPE_00

#define	PLX_VENDOR_ID 0x10B5

#define	PLX_VENDOR_ID_PTOP 0x3388

#define	PLX_9050_DEVICE_ID 0x9050

#define	PLX_9030_DEVICE_ID 0x9030

#define	PLX_9060_DEVICE_ID 0x9060

#define	PLX_9080_DEVICE_ID 0x9080

#define	PLX_9054_DEVICE_ID 0x9054

#define	PLX_9056_DEVICE_ID 0x9056

#define	PLX_9656_DEVICE_ID 0x9656

#define	PLX_DEVICE_ID_6140 0x0021

#define	PLX_DEVICE_ID_6152 PLX_DEVICE_ID_6140

#define	PLX_DEVICE_ID_6150 0x0022

#define	PLX_DEVICE_ID_6154 0x0026

#define	PLX_DEVICE_ID_6254 0x0020

#define	PLX_DEVICE_ID_6520 0x0030

#define	PLX_DEVICE_ID_6540 0x0028

#define	PLX_9080RDK_960_DEVICE_ID 0x0960

#define	PLX_9080RDK_401B_DEVICE_ID 0x0401

#define	PLX_9080RDK_860_DEVICE_ID 0x0860

#define	PLX_9054RDK_860_DEVICE_ID 0x1860

#define	PLX_9054RDK_LITE_DEVICE_ID 0x5406

#define	PLX_CPCI9054RDK_860_DEVICE_ID 0xC860

#define	PLX_9056RDK_LITE_DEVICE_ID 0x5601

#define	PLX_9056RDK_860_DEVICE_ID 0x56c2

#define	PLX_9656RDK_LITE_DEVICE_ID 0x9601

#define	PLX_9656RDK_860_DEVICE_ID 0x96c2

#define	PLX_9030RDK_LITE_DEVICE_ID 0x3001

#define	PLX_CPCI9030RDK_LITE_DEVICE_ID 0x30c1

#define	PLX_9050RDK_LITE_DEVICE_ID 0x9050

#define	PLX_9052RDK_LITE_DEVICE_ID 0x5201

#define	FIFO_SIZE_512B 0x00200

#define	FIFO_SIZE_2K 0x00800

#define	FIFO_SIZE_8K 0x02000

#define	FIFO_SIZE_16K 0x04000

#define	FIFO_SIZE_32K 0x08000

#define	FIFO_SIZE_64K 0x10000

#define	FIFO_SIZE_128K 0x20000

#define	FIFO_SIZE_256K 0x40000

#define	PCI_FIELD_IGNORE (-1)

#define	HS_LED_ON 0x08

#define	HS_BOARD_REMOVED 0x40

#define	HS_BOARD_INSERTED 0x80

#define	CAPABILITY_POWER_MANAGEMENT (1 << 0)

#define	CAPABILITY_HOT_SWAP (1 << 1)

#define	CAPABILITY_VPD (1 << 2)

#define	PM_D0_STATE 0

#define	PM_D1_STATE 1

#define	PM_D2_STATE 2

#define	PM_D3HOT_STATE 3

#define	VPD_COMMAND_MAX_RETRIES 5

#define	VPD_STATUS_MAX_POLL 10

#define	VPD_STATUS_POLL_DELAY 5

#define	PLX_RESET_EMBED_INT ((unsigned long)1 << 31)

#define	FIND_AMOUNT_MATCHED 80001

#define	BE_U32_BIT0 0x80000000

#define	BE_U32_BIT1 0x40000000

#define	BE_U32_BIT2 0x20000000

#define	BE_U32_BIT3 0x10000000

#define	BE_U32_BIT4 0x08000000

#define	BE_U32_BIT5 0x04000000

#define	BE_U32_BIT6 0x02000000

#define	BE_U32_BIT7 0x01000000

#define	BE_U32_BIT8 0x00800000

#define	BE_U32_BIT9 0x00400000

#define	BE_U32_BIT10 0x00200000

#define	BE_U32_BIT11 0x00100000

#define	BE_U32_BIT12 0x00080000

#define	BE_U32_BIT13 0x00040000

#define	BE_U32_BIT14 0x00020000

#define	BE_U32_BIT15 0x00010000

#define	BE_U32_BIT16 0x00008000

#define	BE_U32_BIT17 0x00004000

#define	BE_U32_BIT18 0x00002000

#define	BE_U32_BIT19 0x00001000

#define	BE_U32_BIT20 0x00000800

#define	BE_U32_BIT21 0x00000400

#define	BE_U32_BIT22 0x00000200

#define	BE_U32_BIT23 0x00000100

#define	BE_U32_BIT24 0x00000080

#define	BE_U32_BIT25 0x00000040

#define	BE_U32_BIT26 0x00000020

#define	BE_U32_BIT27 0x00000010

#define	BE_U32_BIT28 0x00000008

#define	BE_U32_BIT29 0x00000004

#define	BE_U32_BIT30 0x00000002

#define	BE_U32_BIT31 0x00000001

#define	BE_U16_BIT0 0x8000

#define	BE_U16_BIT1 0x4000

#define	BE_U16_BIT2 0x2000

#define	BE_U16_BIT3 0x1000

#define	BE_U16_BIT4 0x0800

#define	BE_U16_BIT5 0x0400

#define	BE_U16_BIT6 0x0200

#define	BE_U16_BIT7 0x0100

#define	BE_U16_BIT8 0x0080

#define	BE_U16_BIT9 0x0040

#define	BE_U16_BIT10 0x0020

#define	BE_U16_BIT11 0x0010

#define	BE_U16_BIT12 0x0008

#define	BE_U16_BIT13 0x0004

#define	BE_U16_BIT14 0x0002

#define	BE_U16_BIT15 0x0001

#define	BE_U8_BIT0 0x80

#define	BE_U8_BIT1 0x40

#define	BE_U8_BIT2 0x20

#define	BE_U8_BIT3 0x10

#define	BE_U8_BIT4 0x08

#define	BE_U8_BIT5 0x04

#define	BE_U8_BIT6 0x02

#define	BE_U8_BIT7 0x01

Macro Definition Documentation

◆ BE_U16_BIT0

#define BE_U16_BIT0 0x8000

◆ BE_U16_BIT1

#define BE_U16_BIT1 0x4000

◆ BE_U16_BIT10

#define BE_U16_BIT10 0x0020

◆ BE_U16_BIT11

#define BE_U16_BIT11 0x0010

◆ BE_U16_BIT12

#define BE_U16_BIT12 0x0008

◆ BE_U16_BIT13

#define BE_U16_BIT13 0x0004

◆ BE_U16_BIT14

#define BE_U16_BIT14 0x0002

◆ BE_U16_BIT15

#define BE_U16_BIT15 0x0001

◆ BE_U16_BIT2

#define BE_U16_BIT2 0x2000

◆ BE_U16_BIT3

#define BE_U16_BIT3 0x1000

◆ BE_U16_BIT4

#define BE_U16_BIT4 0x0800

◆ BE_U16_BIT5

#define BE_U16_BIT5 0x0400

◆ BE_U16_BIT6

#define BE_U16_BIT6 0x0200

◆ BE_U16_BIT7

#define BE_U16_BIT7 0x0100

◆ BE_U16_BIT8

#define BE_U16_BIT8 0x0080

◆ BE_U16_BIT9

#define BE_U16_BIT9 0x0040

◆ BE_U32_BIT0

#define BE_U32_BIT0 0x80000000

◆ BE_U32_BIT1

#define BE_U32_BIT1 0x40000000

◆ BE_U32_BIT10

#define BE_U32_BIT10 0x00200000

◆ BE_U32_BIT11

#define BE_U32_BIT11 0x00100000

◆ BE_U32_BIT12

#define BE_U32_BIT12 0x00080000

◆ BE_U32_BIT13

#define BE_U32_BIT13 0x00040000

◆ BE_U32_BIT14

#define BE_U32_BIT14 0x00020000

◆ BE_U32_BIT15

#define BE_U32_BIT15 0x00010000

◆ BE_U32_BIT16

#define BE_U32_BIT16 0x00008000

◆ BE_U32_BIT17

#define BE_U32_BIT17 0x00004000

◆ BE_U32_BIT18

#define BE_U32_BIT18 0x00002000

◆ BE_U32_BIT19

#define BE_U32_BIT19 0x00001000

◆ BE_U32_BIT2

#define BE_U32_BIT2 0x20000000

◆ BE_U32_BIT20

#define BE_U32_BIT20 0x00000800

◆ BE_U32_BIT21

#define BE_U32_BIT21 0x00000400

◆ BE_U32_BIT22

#define BE_U32_BIT22 0x00000200

◆ BE_U32_BIT23

#define BE_U32_BIT23 0x00000100

◆ BE_U32_BIT24

#define BE_U32_BIT24 0x00000080

◆ BE_U32_BIT25

#define BE_U32_BIT25 0x00000040

◆ BE_U32_BIT26

#define BE_U32_BIT26 0x00000020

◆ BE_U32_BIT27

#define BE_U32_BIT27 0x00000010

◆ BE_U32_BIT28

#define BE_U32_BIT28 0x00000008

◆ BE_U32_BIT29

#define BE_U32_BIT29 0x00000004

◆ BE_U32_BIT3

#define BE_U32_BIT3 0x10000000

◆ BE_U32_BIT30

#define BE_U32_BIT30 0x00000002

◆ BE_U32_BIT31

#define BE_U32_BIT31 0x00000001

◆ BE_U32_BIT4

#define BE_U32_BIT4 0x08000000

◆ BE_U32_BIT5

#define BE_U32_BIT5 0x04000000

◆ BE_U32_BIT6

#define BE_U32_BIT6 0x02000000

◆ BE_U32_BIT7

#define BE_U32_BIT7 0x01000000

◆ BE_U32_BIT8

#define BE_U32_BIT8 0x00800000

◆ BE_U32_BIT9

#define BE_U32_BIT9 0x00400000

◆ BE_U8_BIT0

#define BE_U8_BIT0 0x80

◆ BE_U8_BIT1

#define BE_U8_BIT1 0x40

◆ BE_U8_BIT2

#define BE_U8_BIT2 0x20

◆ BE_U8_BIT3

#define BE_U8_BIT3 0x10

◆ BE_U8_BIT4

#define BE_U8_BIT4 0x08

◆ BE_U8_BIT5

#define BE_U8_BIT5 0x04

◆ BE_U8_BIT6

#define BE_U8_BIT6 0x02

◆ BE_U8_BIT7

#define BE_U8_BIT7 0x01

◆ CAPABILITY_HOT_SWAP

#define CAPABILITY_HOT_SWAP (1 << 1)

◆ CAPABILITY_POWER_MANAGEMENT

#define CAPABILITY_POWER_MANAGEMENT (1 << 0)

◆ CAPABILITY_VPD

#define CAPABILITY_VPD (1 << 2)

◆ FIFO_SIZE_128K

#define FIFO_SIZE_128K 0x20000

◆ FIFO_SIZE_16K

#define FIFO_SIZE_16K 0x04000

◆ FIFO_SIZE_256K

#define FIFO_SIZE_256K 0x40000

◆ FIFO_SIZE_2K

#define FIFO_SIZE_2K 0x00800

◆ FIFO_SIZE_32K

#define FIFO_SIZE_32K 0x08000

◆ FIFO_SIZE_512B

#define FIFO_SIZE_512B 0x00200

◆ FIFO_SIZE_64K

#define FIFO_SIZE_64K 0x10000

◆ FIFO_SIZE_8K

#define FIFO_SIZE_8K 0x02000

◆ FIND_AMOUNT_MATCHED

#define FIND_AMOUNT_MATCHED 80001

◆ HS_BOARD_INSERTED

#define HS_BOARD_INSERTED 0x80

◆ HS_BOARD_REMOVED

#define HS_BOARD_REMOVED 0x40

◆ HS_LED_ON

#define HS_LED_ON 0x08

◆ MAX_PCI_BUS

#define MAX_PCI_BUS 32

◆ MAX_PCI_DEV

#define MAX_PCI_DEV 32

◆ MAX_PCI_FUNC

#define MAX_PCI_FUNC 8

◆ PCI_FIELD_IGNORE

#define PCI_FIELD_IGNORE (-1)

◆ PCI_NUM_BARS

#define PCI_NUM_BARS PCI_NUM_BARS_TYPE_00

◆ PCI_NUM_BARS_TYPE_00

#define PCI_NUM_BARS_TYPE_00 7

◆ PCI_NUM_BARS_TYPE_01

#define PCI_NUM_BARS_TYPE_01 2

◆ PLX_9030_DEVICE_ID

#define PLX_9030_DEVICE_ID 0x9030

◆ PLX_9030RDK_LITE_DEVICE_ID

#define PLX_9030RDK_LITE_DEVICE_ID 0x3001

◆ PLX_9050_DEVICE_ID

#define PLX_9050_DEVICE_ID 0x9050

◆ PLX_9050RDK_LITE_DEVICE_ID

#define PLX_9050RDK_LITE_DEVICE_ID 0x9050

◆ PLX_9052RDK_LITE_DEVICE_ID

#define PLX_9052RDK_LITE_DEVICE_ID 0x5201

◆ PLX_9054_DEVICE_ID

#define PLX_9054_DEVICE_ID 0x9054

◆ PLX_9054RDK_860_DEVICE_ID

#define PLX_9054RDK_860_DEVICE_ID 0x1860

◆ PLX_9054RDK_LITE_DEVICE_ID

#define PLX_9054RDK_LITE_DEVICE_ID 0x5406

◆ PLX_9056_DEVICE_ID

#define PLX_9056_DEVICE_ID 0x9056

◆ PLX_9056RDK_860_DEVICE_ID

#define PLX_9056RDK_860_DEVICE_ID 0x56c2

◆ PLX_9056RDK_LITE_DEVICE_ID

#define PLX_9056RDK_LITE_DEVICE_ID 0x5601

◆ PLX_9060_DEVICE_ID

#define PLX_9060_DEVICE_ID 0x9060

◆ PLX_9080_DEVICE_ID

#define PLX_9080_DEVICE_ID 0x9080

◆ PLX_9080RDK_401B_DEVICE_ID

#define PLX_9080RDK_401B_DEVICE_ID 0x0401

◆ PLX_9080RDK_860_DEVICE_ID

#define PLX_9080RDK_860_DEVICE_ID 0x0860

◆ PLX_9080RDK_960_DEVICE_ID

#define PLX_9080RDK_960_DEVICE_ID 0x0960

◆ PLX_9656_DEVICE_ID

#define PLX_9656_DEVICE_ID 0x9656

◆ PLX_9656RDK_860_DEVICE_ID

#define PLX_9656RDK_860_DEVICE_ID 0x96c2

◆ PLX_9656RDK_LITE_DEVICE_ID

#define PLX_9656RDK_LITE_DEVICE_ID 0x9601

◆ PLX_CPCI9030RDK_LITE_DEVICE_ID

#define PLX_CPCI9030RDK_LITE_DEVICE_ID 0x30c1

◆ PLX_CPCI9054RDK_860_DEVICE_ID

#define PLX_CPCI9054RDK_860_DEVICE_ID 0xC860

◆ PLX_DEVICE_ID_6140

#define PLX_DEVICE_ID_6140 0x0021

◆ PLX_DEVICE_ID_6150

#define PLX_DEVICE_ID_6150 0x0022

◆ PLX_DEVICE_ID_6152

#define PLX_DEVICE_ID_6152 PLX_DEVICE_ID_6140

◆ PLX_DEVICE_ID_6154

#define PLX_DEVICE_ID_6154 0x0026

◆ PLX_DEVICE_ID_6254

#define PLX_DEVICE_ID_6254 0x0020

◆ PLX_DEVICE_ID_6520

#define PLX_DEVICE_ID_6520 0x0030

◆ PLX_DEVICE_ID_6540

#define PLX_DEVICE_ID_6540 0x0028

◆ PLX_RESET_EMBED_INT

#define PLX_RESET_EMBED_INT ((unsigned long)1 << 31)

◆ PLX_VENDOR_ID

#define PLX_VENDOR_ID 0x10B5

◆ PLX_VENDOR_ID_PTOP

#define PLX_VENDOR_ID_PTOP 0x3388

◆ PM_D0_STATE

#define PM_D0_STATE 0

◆ PM_D1_STATE

#define PM_D1_STATE 1

◆ PM_D2_STATE

#define PM_D2_STATE 2

◆ PM_D3HOT_STATE

#define PM_D3HOT_STATE 3

◆ VPD_COMMAND_MAX_RETRIES

#define VPD_COMMAND_MAX_RETRIES 5

◆ VPD_STATUS_MAX_POLL

#define VPD_STATUS_MAX_POLL 10

◆ VPD_STATUS_POLL_DELAY

#define VPD_STATUS_POLL_DELAY 5

Macros