enum | Basda::Microgate::OpCode {
Basda::Microgate::MGP_OP_WRSAME_DSP = 0,
Basda::Microgate::MGP_OP_RDSEQ_DSP = 2,
Basda::Microgate::MGP_OP_RESET_DEVICES = 10,
Basda::Microgate::MGP_OP_WR_SCIMEASURE_RAM = 135,
Basda::Microgate::MGP_OP_WRSAME_SDRAM = 141,
Basda::Microgate::MGP_OP_RDSEQ_SDRAM = 143,
Basda::Microgate::MGP_OP_WRSAME_SRAM = 146,
Basda::Microgate::MGP_OP_RDSEQ_SRAM = 148,
Basda::Microgate::MGP_OP_WRITE_CCDI = 155,
Basda::Microgate::MGP_OP_READ_CCDI = 156,
Basda::Microgate::MGP_OP_WRSAME_DSP = 0,
Basda::Microgate::MGP_OP_RDSEQ_DSP = 2,
Basda::Microgate::MGP_OP_RESET_DEVICES = 10,
Basda::Microgate::MGP_OP_WR_SCIMEASURE_RAM = 135,
Basda::Microgate::MGP_OP_WRSAME_SDRAM = 141,
Basda::Microgate::MGP_OP_RDSEQ_SDRAM = 143,
Basda::Microgate::MGP_OP_WRSAME_SRAM = 146,
Basda::Microgate::MGP_OP_RDSEQ_SRAM = 148,
Basda::Microgate::MGP_OP_WRITE_CCDI = 155,
Basda::Microgate::MGP_OP_READ_CCDI = 156,
Basda::Microgate::MGP_OP_WRSAME_DSP = 0,
Basda::Microgate::MGP_OP_RDSEQ_DSP = 2,
Basda::Microgate::MGP_OP_RESET_DEVICES = 10,
Basda::Microgate::MGP_OP_WR_SCIMEASURE_RAM = 135,
Basda::Microgate::MGP_OP_WRSAME_SDRAM = 141,
Basda::Microgate::MGP_OP_RDSEQ_SDRAM = 143,
Basda::Microgate::MGP_OP_WRSAME_SRAM = 146,
Basda::Microgate::MGP_OP_RDSEQ_SRAM = 148,
Basda::Microgate::MGP_OP_WRITE_CCDI = 155,
Basda::Microgate::MGP_OP_READ_CCDI = 156
} |